Lines Matching defs:data1
1261 u32 data0, data1, clock;
1267 data0 = data1 = 0;
1284 data1 = ((ath5k_hw_bitswap(ath5k_channel - 24, 8) & 0xff) << 2) |
1288 data1 = ((ath5k_hw_bitswap((ath5k_channel - 24) / 2, 8) & 0xff)
1292 ath5k_hw_reg_write(ah, (data1 & 0xff) | ((data0 & 0xff) << 8),
1294 ath5k_hw_reg_write(ah, ((data1 >> 8) & 0xff) | (data0 & 0xff00),
1316 u32 data, data0, data1, data2;
1319 data = data0 = data1 = data2 = 0;
1325 * (3040/2). data0 is used to set the PLL divider and data1
1333 data1 = 1;
1339 data1 = 0;
1370 data = (data0 << 4) | (data1 << 1) | (data2 << 2) | 0x1001;