Lines Matching refs:addr
232 .addr = 0x00000018,
253 .addr = 0x00000030,
264 .addr = 0x00000038,
280 .addr = 0x0000004c,
299 .addr = 0x00000050,
364 .addr = 0x00000010,
407 .addr = 0x00000030,
418 .addr = 0x00000038,
434 .addr = 0x0000004c,
453 .addr = 0x00000050,
743 u32 addr, reg_val, mem_val;
759 addr = (RTC_SOC_BASE_ADDRESS | EFUSE_OFFSET);
760 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
771 addr = (RTC_SOC_BASE_ADDRESS | BB_PLL_CONFIG_OFFSET);
772 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
779 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
784 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_SETTLE_OFFSET);
785 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
791 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
796 addr = (RTC_SOC_BASE_ADDRESS | SOC_CORE_CLK_CTRL_OFFSET);
797 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
803 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
815 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
816 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
823 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
829 addr = (RTC_WMAC_BASE_ADDRESS | RTC_SYNC_STATUS_OFFSET);
831 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
847 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
848 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
854 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
860 addr = (RTC_WMAC_BASE_ADDRESS | RTC_SYNC_STATUS_OFFSET);
862 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
878 addr = (RTC_SOC_BASE_ADDRESS | SOC_CPU_CLOCK_OFFSET);
879 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
885 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
890 addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
891 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
896 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
939 u32 addr = address & REGION_ACCESS_SIZE_MASK;
945 if (addr + length > REGION_ACCESS_SIZE_LIMIT) {
946 size = REGION_ACCESS_SIZE_LIMIT - addr;
1047 base_addr = __le32_to_cpu(metadata->addr);