Lines Matching refs:sc
156 lmc_dummy_set_1 (lmc_softc_t * const sc, int a)
161 lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a)
170 lmc_hssi_init (lmc_softc_t * const sc)
172 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
174 lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK);
178 lmc_hssi_default (lmc_softc_t * const sc)
180 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
182 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
183 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
184 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
192 lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
196 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
197 lmc_set_protocol (sc, NULL);
205 if (ctl->clock_source && !sc->ictl.clock_source)
207 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
208 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
210 else if (!ctl->clock_source && sc->ictl.clock_source)
212 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
213 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
216 lmc_set_protocol (sc, ctl);
223 lmc_hssi_set_clock (lmc_softc_t * const sc, int ie)
226 old = sc->ictl.clock_source;
229 sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
230 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
231 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
237 sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
238 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
239 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
250 lmc_hssi_get_link_status (lmc_softc_t * const sc)
256 return lmc_ssi_get_link_status(sc);
260 lmc_hssi_set_link_status (lmc_softc_t * const sc, int state)
263 sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
265 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
267 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
274 lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state)
279 sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
280 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
285 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
286 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
289 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
293 lmc_hssi_watchdog (lmc_softc_t * const sc)
306 lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie)
310 sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
311 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
315 sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
316 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
318 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
322 lmc_ds3_default (lmc_softc_t * const sc)
324 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
326 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
327 sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
328 sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF);
329 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
337 lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
341 sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length);
342 sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff);
343 lmc_set_protocol (sc, NULL);
351 if (ctl->cable_length && !sc->ictl.cable_length)
352 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
353 else if (!ctl->cable_length && sc->ictl.cable_length)
354 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
359 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
360 lmc_ds3_set_scram (sc, LMC_CTL_ON);
361 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
362 lmc_ds3_set_scram (sc, LMC_CTL_OFF);
364 lmc_set_protocol (sc, ctl);
368 lmc_ds3_init (lmc_softc_t * const sc)
372 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
377 lmc_mii_writereg (sc, 0, 17, i);
378 lmc_mii_writereg (sc, 0, 18, 0);
382 lmc_mii_writereg (sc, 0, 17, 1);
383 lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */
385 lmc_mii_writereg (sc, 0, 17, 5);
386 lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */
388 lmc_mii_writereg (sc, 0, 17, 14);
389 lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */
394 lmc_mii_writereg (sc, 0, 17, i);
395 lmc_mii_readreg (sc, 0, 18);
403 lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
407 sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
408 sc->ictl.scrambler_onoff = LMC_CTL_ON;
412 sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
413 sc->ictl.scrambler_onoff = LMC_CTL_OFF;
415 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
423 lmc_ds3_get_link_status (lmc_softc_t * const sc)
428 lmc_mii_writereg (sc, 0, 17, 7);
429 link_status = lmc_mii_readreg (sc, 0, 18);
441 lmc_led_on(sc, LMC_DS3_LED2);
446 if(sc->last_led_err[3] != 1){
448 lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
449 r1 = lmc_mii_readreg (sc, 0, 18);
451 lmc_mii_writereg(sc, 0, 18, r1);
452 printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name);
454 lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */
455 sc->last_led_err[3] = 1;
458 lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */
459 if(sc->last_led_err[3] == 1){
461 lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
462 r1 = lmc_mii_readreg (sc, 0, 18);
464 lmc_mii_writereg(sc, 0, 18, r1);
466 sc->last_led_err[3] = 0;
469 lmc_mii_writereg(sc, 0, 17, 0x10);
470 link_status_11 = lmc_mii_readreg(sc, 0, 18);
474 if(sc->last_led_err[0] != 1){
475 printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name);
476 printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name);
478 lmc_led_on(sc, LMC_DS3_LED0);
479 sc->last_led_err[0] = 1;
482 lmc_led_off(sc, LMC_DS3_LED0);
483 sc->last_led_err[0] = 0;
486 lmc_mii_writereg (sc, 0, 17, 9);
487 link_status = lmc_mii_readreg (sc, 0, 18);
491 if(sc->last_led_err[1] != 1){
492 printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name);
494 lmc_led_on(sc, LMC_DS3_LED1);
495 sc->last_led_err[1] = 1;
498 lmc_led_off(sc, LMC_DS3_LED1);
499 sc->last_led_err[1] = 0;
509 lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state)
514 sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
515 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
520 sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
521 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
524 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
528 lmc_ds3_watchdog (lmc_softc_t * const sc)
538 static void lmc_ssi_init(lmc_softc_t * const sc)
543 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
545 mii17 = lmc_mii_readreg(sc, 0, 17);
548 sc->ictl.cable_type = cable;
550 lmc_gpio_mkoutput(sc, LMC_GEP_SSI_TXCLOCK);
554 lmc_ssi_default (lmc_softc_t * const sc)
556 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
561 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
563 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
564 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
565 sc->lmc_media->set_speed (sc, NULL);
566 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
574 lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
578 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
579 sc->lmc_media->set_speed (sc, &sc->ictl);
580 lmc_set_protocol (sc, NULL);
589 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT)
591 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
592 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
595 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT)
597 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
598 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
601 if (ctl->clock_rate != sc->ictl.clock_rate)
602 sc->lmc_media->set_speed (sc, ctl);
604 lmc_set_protocol (sc, ctl);
611 lmc_ssi_set_clock (lmc_softc_t * const sc, int ie)
617 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
618 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
619 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
625 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
626 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
627 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
634 lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
636 lmc_ctl_t *ictl = &sc->ictl;
656 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
668 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
676 lmc_ssi_get_link_status (lmc_softc_t * const sc)
703 link_status = lmc_mii_readreg (sc, 0, 16);
706 ticks = LMC_CSR_READ (sc, csr_gp_timer);
709 lmc_led_on (sc, LMC_MII16_LED0);
712 if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) {
713 lmc_led_off(sc, LMC_MII16_LED3);
717 if (sc->last_led_err[3] != 1) {
718 sc->extra_stats.tx_lossOfClockCnt++;
719 printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
721 sc->last_led_err[3] = 1;
722 lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */
725 if(sc->last_led_err[3] == 1)
726 printk(KERN_WARNING "%s: Clock Returned\n", sc->name);
727 sc->last_led_err[3] = 0;
728 lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */
744 if(sc->last_led_err[1] != 1)
745 printk(KERN_WARNING "%s: DSR not asserted\n", sc->name);
746 sc->last_led_err[1] = 1;
747 lmc_led_off(sc, LMC_MII16_LED1);
750 if(sc->last_led_err[1] != 0)
751 printk(KERN_WARNING "%s: DSR now asserted\n", sc->name);
752 sc->last_led_err[1] = 0;
753 lmc_led_on(sc, LMC_MII16_LED1);
757 lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */
764 lmc_ssi_set_link_status (lmc_softc_t * const sc, int state)
768 sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
773 sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
777 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
785 lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state)
790 sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
791 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
792 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
798 sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
799 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
800 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
803 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
810 write_av9110_bit (lmc_softc_t * sc, int c)
815 sc->lmc_gpio &= ~(LMC_GEP_CLK);
817 sc->lmc_gpio |= LMC_GEP_DATA;
819 sc->lmc_gpio &= ~(LMC_GEP_DATA);
820 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
825 sc->lmc_gpio |= LMC_GEP_CLK;
826 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
831 sc->lmc_gpio &= ~(LMC_GEP_CLK);
832 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
835 static void write_av9110(lmc_softc_t *sc, u32 n, u32 m, u32 v, u32 x, u32 r)
841 LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r);
844 sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
845 sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK);
846 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
852 lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK
855 sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
856 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
862 write_av9110_bit (sc, n >> i);
864 write_av9110_bit (sc, m >> i);
866 write_av9110_bit (sc, v >> i);
868 write_av9110_bit (sc, x >> i);
870 write_av9110_bit (sc, r >> i);
872 write_av9110_bit (sc, 0x17 >> i);
877 lmc_gpio_mkinput (sc,
882 static void lmc_ssi_watchdog(lmc_softc_t * const sc)
884 u16 mii17 = lmc_mii_readreg(sc, 0, 17);
886 lmc_led_off(sc, LMC_MII16_LED2);
888 lmc_led_on(sc, LMC_MII16_LED2);
899 lmc_t1_write (lmc_softc_t * const sc, int a, int d)
901 lmc_mii_writereg (sc, 0, 17, a);
902 lmc_mii_writereg (sc, 0, 18, d);
907 lmc_t1_read (lmc_softc_t * const sc, int a)
909 lmc_mii_writereg (sc, 0, 17, a);
910 return lmc_mii_readreg (sc, 0, 18);
916 lmc_t1_init (lmc_softc_t * const sc)
921 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
922 mii16 = lmc_mii_readreg (sc, 0, 16);
926 lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST);
927 lmc_mii_writereg (sc, 0, 16, mii16);
929 /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */
930 sc->lmc_miireg16 = mii16;
931 lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
932 mii16 = sc->lmc_miireg16;
934 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */
935 lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */
936 lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */
937 lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */
938 lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */
939 lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */
940 lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */
941 lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */
942 lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */
943 lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */
944 lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */
945 lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */
946 lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */
947 lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */
948 lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */
949 lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */
950 lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */
951 lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */
952 lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */
953 lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */
954 lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */
955 lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */
956 lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */
957 lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */
958 lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */
959 lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */
960 lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */
961 lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */
964 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */
965 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */
966 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */
970 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */
974 lmc_mii_writereg (sc, 0, 16, mii16);
975 sc->lmc_miireg16 = mii16;
979 lmc_t1_default (lmc_softc_t * const sc)
981 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
982 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
983 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
984 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
986 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
991 lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
995 sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type);
996 lmc_set_protocol (sc, NULL);
1003 && sc->ictl.circuit_type ==
1004 LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc,
1007 && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
1008 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1009 lmc_set_protocol (sc, ctl);
1015 lmc_t1_get_link_status (lmc_softc_t * const sc)
1029 lmc_led_on(sc, LMC_DS3_LED2);
1031 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS);
1032 link_status = lmc_mii_readreg (sc, 0, 18);
1037 if(sc->last_led_err[1] != 1){
1038 printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name);
1040 lmc_led_on(sc, LMC_DS3_LED1);
1041 sc->last_led_err[1] = 1;
1044 if(sc->last_led_err[1] != 0){
1045 printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name);
1047 lmc_led_off (sc, LMC_DS3_LED1);
1048 sc->last_led_err[1] = 0;
1063 if(sc->last_led_err[0] != 1){
1064 printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name);
1066 lmc_led_on(sc, LMC_DS3_LED0);
1067 sc->last_led_err[0] = 1;
1070 if(sc->last_led_err[0] != 0){
1071 printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name);
1073 lmc_led_off(sc, LMC_DS3_LED0);
1074 sc->last_led_err[0] = 0;
1083 if(sc->last_led_err[3] != 1){
1084 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name);
1086 lmc_led_on(sc, LMC_DS3_LED3);
1087 sc->last_led_err[3] = 1;
1091 if(sc->last_led_err[3] != 0){
1092 printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name);
1095 lmc_led_off(sc, LMC_DS3_LED3);
1096 sc->last_led_err[3] = 0;
1101 if(sc->last_led_err[2] != 1){
1102 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name);
1104 lmc_led_on(sc, LMC_DS3_LED3);
1105 sc->last_led_err[2] = 1;
1109 if(sc->last_led_err[2] != 0){
1110 printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name);
1113 lmc_led_off(sc, LMC_DS3_LED3);
1114 sc->last_led_err[2] = 0;
1117 sc->lmc_xinfo.t1_alarm1_status = link_status;
1119 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS);
1120 sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18);
1129 lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie)
1132 sc->lmc_miireg16 |= LMC_MII16_T1_Z;
1133 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
1134 printk(KERN_INFO "%s: In T1 Mode\n", sc->name);
1137 sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
1138 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1;
1139 printk(KERN_INFO "%s: In E1 Mode\n", sc->name);
1142 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1149 lmc_t1_set_crc_length (lmc_softc_t * const sc, int state)
1154 sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
1155 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
1156 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
1161 /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
1162 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
1163 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
1167 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1174 lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
1180 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
1181 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1182 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
1188 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
1189 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1190 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1197 lmc_t1_watchdog (lmc_softc_t * const sc)
1202 lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1205 sc->ictl.keepalive_onoff = LMC_CTL_ON;