Lines Matching refs:sc
95 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
100 static void lmc_reset(lmc_softc_t * const sc);
101 static void lmc_dec_reset(lmc_softc_t * const sc);
110 lmc_softc_t *sc = dev_to_sc(dev);
127 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
149 spin_lock_irqsave(&sc->lmc_lock, flags);
150 sc->lmc_media->set_status (sc, &ctl);
152 if(ctl.crc_length != sc->ictl.crc_length) {
153 sc->lmc_media->set_crc_length(sc, ctl.crc_length);
154 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
155 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
157 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
159 spin_unlock_irqrestore(&sc->lmc_lock, flags);
166 u16 old_type = sc->if_type;
186 spin_lock_irqsave(&sc->lmc_lock, flags);
187 lmc_proto_close(sc);
189 sc->if_type = new_type;
190 lmc_proto_attach(sc);
191 ret = lmc_proto_open(sc);
192 spin_unlock_irqrestore(&sc->lmc_lock, flags);
197 spin_lock_irqsave(&sc->lmc_lock, flags);
198 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
200 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
201 sc->lmc_xinfo.PciSlotNumber = 0;
202 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
203 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
204 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
205 sc->lmc_xinfo.XilinxRevisionNumber =
206 lmc_mii_readreg (sc, 0, 3) & 0xf;
207 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
208 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
209 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
210 spin_unlock_irqrestore(&sc->lmc_lock, flags);
212 sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
214 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
223 spin_lock_irqsave(&sc->lmc_lock, flags);
224 if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
225 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
226 sc->extra_stats.framingBitErrorCount +=
227 lmc_mii_readreg(sc, 0, 18) & 0xff;
228 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
229 sc->extra_stats.framingBitErrorCount +=
230 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
231 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
232 sc->extra_stats.lineCodeViolationCount +=
233 lmc_mii_readreg(sc, 0, 18) & 0xff;
234 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
235 sc->extra_stats.lineCodeViolationCount +=
236 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
237 lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
238 regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
240 sc->extra_stats.lossOfFrameCount +=
242 sc->extra_stats.changeOfFrameAlignmentCount +=
244 sc->extra_stats.severelyErroredFrameCount +=
247 spin_unlock_irqrestore(&sc->lmc_lock, flags);
248 if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
249 sizeof(sc->lmc_device->stats)) ||
250 copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
251 &sc->extra_stats, sizeof(sc->extra_stats)))
263 spin_lock_irqsave(&sc->lmc_lock, flags);
264 memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
265 memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
266 sc->extra_stats.check = STATCHECK;
267 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
268 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
269 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
270 spin_unlock_irqrestore(&sc->lmc_lock, flags);
289 spin_lock_irqsave(&sc->lmc_lock, flags);
290 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
291 sc->ictl.circuit_type = ctl.circuit_type;
292 spin_unlock_irqrestore(&sc->lmc_lock, flags);
303 spin_lock_irqsave(&sc->lmc_lock, flags);
305 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
307 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
309 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
310 spin_unlock_irqrestore(&sc->lmc_lock, flags);
330 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
357 spin_lock_irqsave(&sc->lmc_lock, flags);
358 mii = lmc_mii_readreg (sc, 0, 16);
363 lmc_gpio_mkinput(sc, 0xff);
368 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
376 sc->lmc_gpio &= ~LMC_GEP_RESET;
377 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
385 sc->lmc_gpio |= LMC_GEP_RESET;
386 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
392 lmc_gpio_mkinput(sc, 0xff);
395 sc->lmc_media->set_link_status (sc, 1);
396 sc->lmc_media->set_status (sc, NULL);
397 // lmc_softreset(sc);
402 lmc_led_on(sc, LMC_DS3_LED0);
404 lmc_led_off(sc, LMC_DS3_LED0);
405 lmc_led_on(sc, LMC_DS3_LED1);
407 lmc_led_off(sc, LMC_DS3_LED1);
408 lmc_led_on(sc, LMC_DS3_LED3);
410 lmc_led_off(sc, LMC_DS3_LED3);
411 lmc_led_on(sc, LMC_DS3_LED2);
413 lmc_led_off(sc, LMC_DS3_LED2);
416 spin_unlock_irqrestore(&sc->lmc_lock, flags);
429 spin_lock_irqsave(&sc->lmc_lock, flags);
430 mii = lmc_mii_readreg (sc, 0, 16);
435 lmc_gpio_mkinput(sc, 0xff);
440 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
448 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
449 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
457 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
458 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
463 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
471 lmc_gpio_mkinput(sc, 0xff);
472 spin_unlock_irqrestore(&sc->lmc_lock, flags);
500 spin_lock_irqsave(&sc->lmc_lock, flags);
501 lmc_gpio_mkinput(sc, 0xff);
514 sc->lmc_gpio = 0x00;
515 sc->lmc_gpio &= ~LMC_GEP_DP;
516 sc->lmc_gpio &= ~LMC_GEP_RESET;
517 sc->lmc_gpio |= LMC_GEP_MODE;
518 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
520 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
535 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
540 sc->lmc_gpio = 0x00;
541 sc->lmc_gpio |= LMC_GEP_MODE;
542 sc->lmc_gpio |= LMC_GEP_DATA;
543 sc->lmc_gpio |= LMC_GEP_CLK;
544 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
546 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
551 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
560 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
563 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
567 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
569 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
570 sc->lmc_gpio |= LMC_GEP_MODE;
571 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
574 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
575 sc->lmc_gpio |= LMC_GEP_MODE;
576 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
579 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
582 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
589 lmc_gpio_mkinput(sc, 0xff);
591 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
592 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
594 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
595 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
596 spin_unlock_irqrestore(&sc->lmc_lock, flags);
610 sc->lmc_txfull = 0;
616 ret = lmc_proto_ioctl (sc, ifr, cmd);
627 lmc_softc_t *sc = from_timer(sc, t, timer);
628 struct net_device *dev = sc->lmc_device;
633 spin_lock_irqsave(&sc->lmc_lock, flags);
635 if(sc->check != 0xBEAFCAFE){
637 spin_unlock_irqrestore(&sc->lmc_lock, flags);
646 LMC_CSR_WRITE (sc, csr_15, 0x00000011);
647 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
648 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
650 if (sc->lmc_ok == 0)
653 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
658 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
659 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
660 sc->tx_TimeoutInd == 0)
664 sc->tx_TimeoutInd = 1;
666 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
667 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
668 sc->tx_TimeoutInd)
671 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
673 sc->tx_TimeoutDisplay = 1;
674 sc->extra_stats.tx_TimeoutCnt++;
681 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
689 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
692 sc->tx_TimeoutInd = 0;
693 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
694 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
696 sc->tx_TimeoutInd = 0;
697 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
698 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
704 link_status = sc->lmc_media->get_link_status (sc);
710 if ((link_status == 0) && (sc->last_link_status != 0)) {
712 sc->last_link_status = 0;
713 /* lmc_reset (sc); Why reset??? The link can go down ok */
723 if (link_status != 0 && sc->last_link_status == 0) {
725 sc->last_link_status = 1;
726 /* lmc_reset (sc); Again why reset??? */
732 sc->lmc_media->watchdog(sc);
738 LMC_CSR_WRITE(sc, csr_rxpoll, 0);
744 if(sc->failed_ring == 1){
749 sc->failed_ring = 0;
750 lmc_softreset(sc);
752 if(sc->failed_recv_alloc == 1){
758 sc->failed_recv_alloc = 0;
759 lmc_softreset(sc);
768 ticks = LMC_CSR_READ (sc, csr_gp_timer);
769 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
770 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
775 sc->timer.expires = jiffies + (HZ);
776 add_timer (&sc->timer);
778 spin_unlock_irqrestore(&sc->lmc_lock, flags);
800 lmc_softc_t *sc;
822 sc = devm_kzalloc(&pdev->dev, sizeof(lmc_softc_t), GFP_KERNEL);
823 if (!sc)
826 dev = alloc_hdlcdev(sc);
839 sc->lmc_device = dev;
840 sc->name = dev->name;
841 sc->if_type = LMC_PPP;
842 sc->check = 0xBEAFCAFE;
850 * Must have a valid sc and dev structure
852 lmc_proto_attach(sc);
856 spin_lock_init(&sc->lmc_lock);
869 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
870 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
884 sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
885 sc->lmc_media = &lmc_hssi_media;
889 sc->lmc_cardtype = LMC_CARDTYPE_DS3;
890 sc->lmc_media = &lmc_ds3_media;
894 sc->lmc_cardtype = LMC_CARDTYPE_SSI;
895 sc->lmc_media = &lmc_ssi_media;
899 sc->lmc_cardtype = LMC_CARDTYPE_T1;
900 sc->lmc_media = &lmc_t1_media;
909 lmc_initcsrs (sc, dev->base_addr, 8);
911 lmc_gpio_mkinput (sc, 0xff);
912 sc->lmc_gpio = 0; /* drive no signals yet */
914 sc->lmc_media->defaults (sc);
916 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
921 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
938 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
940 sc->board_idx = cards_found++;
941 sc->extra_stats.check = STATCHECK;
942 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
943 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
944 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
946 sc->lmc_ok = 0;
947 sc->last_link_status = 0;
971 lmc_softc_t *sc = dev_to_sc(dev);
974 lmc_led_on(sc, LMC_DS3_LED0);
976 lmc_dec_reset(sc);
977 lmc_reset(sc);
979 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
980 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
981 lmc_mii_readreg(sc, 0, 17));
983 if (sc->lmc_ok)
986 lmc_softreset (sc);
993 sc->got_irq = 1;
996 sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
997 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1002 sc->lmc_media->set_status (sc, NULL);
1006 sc->TxDescriptControlInit = (
1014 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1016 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1018 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1023 if ((err = lmc_proto_open(sc)) != 0)
1027 sc->extra_stats.tx_tbusy0++;
1032 sc->lmc_intrmask = 0;
1034 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1044 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1046 sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1047 sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1048 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1050 sc->lmc_ok = 1; /* Run watchdog */
1056 sc->last_link_status = 1;
1062 timer_setup(&sc->timer, lmc_watchdog, 0);
1063 sc->timer.expires = jiffies + HZ;
1064 add_timer (&sc->timer);
1075 lmc_softc_t *sc = dev_to_sc(dev);
1079 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1081 lmc_dec_reset (sc);
1082 lmc_reset (sc);
1083 lmc_softreset (sc);
1084 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1085 sc->lmc_media->set_link_status (sc, 1);
1086 sc->lmc_media->set_status (sc, NULL);
1090 sc->lmc_txfull = 0;
1091 sc->extra_stats.tx_tbusy0++;
1093 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1094 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1096 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1097 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1108 lmc_softc_t *sc = dev_to_sc(dev);
1110 sc->lmc_ok = 0;
1111 sc->lmc_media->set_link_status (sc, 0);
1112 del_timer (&sc->timer);
1113 lmc_proto_close(sc);
1123 lmc_softc_t *sc = dev_to_sc(dev);
1130 sc->extra_stats.tx_tbusy1++;
1134 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1137 csr6 = LMC_CSR_READ (sc, csr_command);
1140 LMC_CSR_WRITE (sc, csr_command, csr6);
1142 sc->lmc_device->stats.rx_missed_errors +=
1143 LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1146 if(sc->got_irq == 1){
1148 sc->got_irq = 0;
1154 struct sk_buff *skb = sc->lmc_rxq[i];
1155 sc->lmc_rxq[i] = NULL;
1156 sc->lmc_rxring[i].status = 0;
1157 sc->lmc_rxring[i].length = 0;
1158 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1161 sc->lmc_rxq[i] = NULL;
1166 if (sc->lmc_txq[i] != NULL)
1167 dev_kfree_skb(sc->lmc_txq[i]);
1168 sc->lmc_txq[i] = NULL;
1171 lmc_led_off (sc, LMC_MII16_LED_ALL);
1174 sc->extra_stats.tx_tbusy0++;
1185 lmc_softc_t *sc = dev_to_sc(dev);
1194 spin_lock(&sc->lmc_lock);
1199 csr = LMC_CSR_READ (sc, csr_status);
1204 if ( ! (csr & sc->lmc_intrmask)) {
1211 while (csr & sc->lmc_intrmask) {
1217 LMC_CSR_WRITE (sc, csr_status, csr);
1244 sc->extra_stats.tx_NoCompleteCnt = 0;
1246 badtx = sc->lmc_taint_tx;
1249 while ((badtx < sc->lmc_next_tx)) {
1250 stat = sc->lmc_txring[i].status;
1253 sc->lmc_txring[i].length);
1265 if (sc->lmc_txq[i] == NULL)
1272 sc->lmc_device->stats.tx_errors++;
1274 sc->lmc_device->stats.tx_aborted_errors++;
1276 sc->lmc_device->stats.tx_carrier_errors++;
1278 sc->lmc_device->stats.tx_window_errors++;
1280 sc->lmc_device->stats.tx_fifo_errors++;
1282 sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1284 sc->lmc_device->stats.tx_packets++;
1287 dev_consume_skb_irq(sc->lmc_txq[i]);
1288 sc->lmc_txq[i] = NULL;
1294 if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1300 sc->lmc_txfull = 0;
1302 sc->extra_stats.tx_tbusy0++;
1306 sc->extra_stats.dirtyTx = badtx;
1307 sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1308 sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1310 sc->lmc_taint_tx = badtx;
1334 lmc_dec_reset (sc);
1335 lmc_reset (sc);
1336 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1338 lmc_mii_readreg (sc, 0, 16),
1339 lmc_mii_readreg (sc, 0, 17));
1351 csr = LMC_CSR_READ (sc, csr_status);
1357 spin_unlock(&sc->lmc_lock);
1365 lmc_softc_t *sc = dev_to_sc(dev);
1370 spin_lock_irqsave(&sc->lmc_lock, flags);
1374 entry = sc->lmc_next_tx % LMC_TXDESCS;
1376 sc->lmc_txq[entry] = skb;
1377 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1383 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1389 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1395 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1405 sc->lmc_txfull = 1;
1411 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1413 sc->lmc_txfull = 1;
1415 sc->extra_stats.tx_tbusy1++;
1425 flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1426 sc->TxDescriptControlInit;
1432 sc->extra_stats.tx_NoCompleteCnt++;
1433 sc->lmc_next_tx++;
1437 sc->lmc_txring[entry].status = 0x80000000;
1440 LMC_CSR_WRITE (sc, csr_txpoll, 0);
1442 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1450 lmc_softc_t *sc = dev_to_sc(dev);
1459 lmc_led_on(sc, LMC_DS3_LED3);
1463 i = sc->lmc_next_rx % LMC_RXDESCS;
1465 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1472 sc->lmc_device->stats.rx_length_errors++;
1478 sc->lmc_device->stats.rx_errors++;
1479 sc->lmc_device->stats.rx_frame_errors++;
1485 sc->lmc_device->stats.rx_errors++;
1486 sc->lmc_device->stats.rx_crc_errors++;
1491 sc->lmc_device->stats.rx_length_errors++;
1496 if (len < sc->lmc_crcSize + 2) {
1497 sc->lmc_device->stats.rx_length_errors++;
1498 sc->extra_stats.rx_SmallPktCnt++;
1507 len -= sc->lmc_crcSize;
1509 skb = sc->lmc_rxq[i];
1519 sc->lmc_rxq[i] = nsb;
1521 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1523 sc->failed_recv_alloc = 1;
1527 sc->lmc_device->stats.rx_packets++;
1528 sc->lmc_device->stats.rx_bytes += len;
1545 sc->lmc_rxq[i] = NULL;
1546 sc->lmc_rxring[i].buffer1 = 0x0;
1549 skb->protocol = lmc_proto_type(sc, skb);
1553 lmc_proto_netif(sc, skb);
1560 sc->lmc_rxq[i] = nsb;
1562 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1574 sc->extra_stats.rx_BuffAllocErr++;
1576 sc->failed_recv_alloc = 1;
1587 nsb->protocol = lmc_proto_type(sc, nsb);
1591 lmc_proto_netif(sc, nsb);
1596 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1598 sc->lmc_next_rx++;
1599 i = sc->lmc_next_rx % LMC_RXDESCS;
1609 sc->extra_stats.rx_BadPktSurgeCnt++;
1611 sc->extra_stats.rx_BadPktSurgeCnt);
1615 if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1616 sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1623 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1634 lmc_led_off(sc, LMC_DS3_LED3);
1642 lmc_softc_t *sc = dev_to_sc(dev);
1645 spin_lock_irqsave(&sc->lmc_lock, flags);
1647 sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1649 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1651 return &sc->lmc_device->stats;
1663 unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1669 LMC_MII_SYNC (sc);
1675 LMC_CSR_WRITE (sc, csr_9, dataval);
1678 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1685 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1688 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1689 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1697 void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1702 LMC_MII_SYNC (sc);
1714 LMC_CSR_WRITE (sc, csr_9, datav);
1717 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1726 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1729 LMC_CSR_WRITE (sc, csr_9, 0x50000);
1736 static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1741 sc->lmc_txfull = 0;
1742 sc->lmc_next_rx = 0;
1743 sc->lmc_next_tx = 0;
1744 sc->lmc_taint_rx = 0;
1745 sc->lmc_taint_tx = 0;
1757 if (sc->lmc_rxq[i] == NULL)
1761 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1762 sc->failed_ring = 1;
1766 sc->lmc_rxq[i] = skb;
1771 skb = sc->lmc_rxq[i];
1774 skb->dev = sc->lmc_device;
1777 sc->lmc_rxring[i].status = 0x80000000;
1780 sc->lmc_rxring[i].length = skb_tailroom(skb);
1785 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1788 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1796 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1797 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1799 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1804 if (sc->lmc_txq[i] != NULL){ /* have buffer */
1805 dev_kfree_skb(sc->lmc_txq[i]); /* free it */
1806 sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */
1808 sc->lmc_txq[i] = NULL;
1809 sc->lmc_txring[i].status = 0x00000000;
1810 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1812 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1813 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1816 void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1818 sc->lmc_gpio_io &= ~bits;
1819 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1822 void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1824 sc->lmc_gpio_io |= bits;
1825 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1828 void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1830 if ((~sc->lmc_miireg16) & led) /* Already on! */
1833 sc->lmc_miireg16 &= ~led;
1834 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1837 void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1839 if (sc->lmc_miireg16 & led) /* Already set don't do anything */
1842 sc->lmc_miireg16 |= led;
1843 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1846 static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1848 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1849 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1851 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1852 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1857 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1864 sc->lmc_gpio &= ~(LMC_GEP_RESET);
1865 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1875 lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1880 sc->lmc_media->init(sc);
1882 sc->extra_stats.resetCount++;
1885 static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1892 sc->lmc_intrmask = 0;
1893 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
1901 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
1904 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
1905 sc->lmc_busmode = 0x00100000;
1906 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
1907 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
1909 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
1921 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
1929 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
1935 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
1940 val = LMC_CSR_READ(sc, csr_sia_general);
1942 LMC_CSR_WRITE(sc, csr_sia_general, val);
1945 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
1948 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
1949 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
1950 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
1951 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
1952 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
1953 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
1954 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
1955 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
1956 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
1957 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
1958 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
1959 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
1960 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
1961 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
1962 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
1963 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
1968 lmc_softc_t *sc = dev_to_sc(dev);
1972 spin_lock_irqsave(&sc->lmc_lock, flags);
1976 sc->extra_stats.tx_tbusy_calls++;
1988 LMC_CSR_READ (sc, csr_status),
1989 sc->extra_stats.tx_ProcTimeout);
1993 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1995 lmc_mii_readreg (sc, 0, 16),
1996 lmc_mii_readreg (sc, 0, 17));
1999 csr6 = LMC_CSR_READ (sc, csr_command);
2000 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2001 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2004 LMC_CSR_WRITE (sc, csr_txpoll, 0);
2006 sc->lmc_device->stats.tx_errors++;
2007 sc->extra_stats.tx_ProcTimeout++; /* -baz */
2013 spin_unlock_irqrestore(&sc->lmc_lock, flags);