Lines Matching defs:sca_out
49 #define sca_out(value, reg, card) writeb(value, card->scabase + (reg))
152 sca_out(0, DSR_RX(port->chan), card);
153 sca_out(0, DSR_TX(port->chan), card);
156 sca_out(DCR_ABORT, DCR_RX(port->chan), card);
157 sca_out(DCR_ABORT, DCR_TX(port->chan), card);
167 sca_out(DCR_CLEAR_EOF, DCR_RX(port->chan), card);
168 sca_out(DCR_CLEAR_EOF, DCR_TX(port->chan), card);
172 sca_out(0x14, DMR_RX(port->chan), card); /* Chain mode, Multi-frame */
173 sca_out(DIR_EOME, DIR_RX(port->chan), card); /* enable interrupts */
174 sca_out(DSR_DE, DSR_RX(port->chan), card); /* DMA enable */
177 sca_out(0x14, DMR_TX(port->chan), card); /* Chain mode, Multi-frame */
178 sca_out(DIR_EOME, DIR_TX(port->chan), card); /* enable interrupts */
193 sca_out(ST1_CDCD, msci + ST1, card);
239 sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
280 sca_out(DSR_DE, DSR_RX(port->chan), card);
298 sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
404 sca_out(port->tmc, msci + TMCR, card);
405 sca_out(port->tmc, msci + TMCT, card);
408 sca_out(port->rxs, msci + RXS, card);
409 sca_out(port->txs, msci + TXS, card);
416 sca_out(md2, msci + MD2, card);
447 sca_out(CMD_RESET, msci + CMD, card);
448 sca_out(md0, msci + MD0, card);
449 sca_out(0x00, msci + MD1, card); /* no address field check */
450 sca_out(md2, msci + MD2, card);
451 sca_out(0x7E, msci + IDL, card); /* flag character 0x7E */
453 sca_out(CTL_IDLE | CTL_URCT | CTL_URSKP, msci + CTL, card);
454 sca_out(0x0F, msci + RNR, card); /* +1=RX DMA activation condition */
455 sca_out(0x3C, msci + TFS, card); /* +1 = TX start */
456 sca_out(0x38, msci + TCR, card); /* =Critical TX DMA activ condition */
457 sca_out(0x38, msci + TNR0, card); /* =TX DMA activation condition */
458 sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/
466 sca_out(port->tmc, msci + TMCR, card);
467 sca_out(port->tmc, msci + TMCT, card);
468 sca_out(port->rxs, msci + RXS, card);
469 sca_out(port->txs, msci + TXS, card);
470 sca_out(CMD_TX_ENABLE, msci + CMD, card);
471 sca_out(CMD_RX_ENABLE, msci + CMD, card);
485 sca_out(CMD_RESET, get_msci(port) + CMD, port->card);
591 sca_out(DSR_DE, DSR_TX(port->chan), card); /* Enable TX DMA */
625 sca_out(wait_states, WCRL, card); /* Wait Control */
626 sca_out(wait_states, WCRM, card);
627 sca_out(wait_states, WCRH, card);
629 sca_out(0, DMER, card); /* DMA Master disable */
630 sca_out(0x03, PCR, card); /* DMA priority */
631 sca_out(0, DSR_RX(0), card); /* DMA disable - to halt state */
632 sca_out(0, DSR_TX(0), card);
633 sca_out(0, DSR_RX(1), card);
634 sca_out(0, DSR_TX(1), card);
635 sca_out(DMER_DME, DMER, card); /* DMA Master enable */