Lines Matching refs:suConfig
350 struct su_config suConfig; /* TE1 Bits */
1692 FST_WRL(card, suConfig.dataRate, info->lineSpeed);
1693 FST_WRB(card, suConfig.clocking, info->clockSource);
1701 FST_WRB(card, suConfig.framing, my_framing);
1702 FST_WRB(card, suConfig.structure, info->structure);
1703 FST_WRB(card, suConfig.interface, info->interface);
1704 FST_WRB(card, suConfig.coding, info->coding);
1705 FST_WRB(card, suConfig.lineBuildOut, info->lineBuildOut);
1706 FST_WRB(card, suConfig.equalizer, info->equalizer);
1707 FST_WRB(card, suConfig.transparentMode, info->transparentMode);
1708 FST_WRB(card, suConfig.loopMode, info->loopMode);
1709 FST_WRB(card, suConfig.range, info->range);
1710 FST_WRB(card, suConfig.txBufferMode, info->txBufferMode);
1711 FST_WRB(card, suConfig.rxBufferMode, info->rxBufferMode);
1712 FST_WRB(card, suConfig.startingSlot, info->startingSlot);
1713 FST_WRB(card, suConfig.losThreshold, info->losThreshold);
1715 FST_WRB(card, suConfig.enableIdleCode, 1);
1717 FST_WRB(card, suConfig.enableIdleCode, 0);
1718 FST_WRB(card, suConfig.idleCode, info->idleCode);
1813 info->lineSpeed = FST_RDL(card, suConfig.dataRate);
1814 info->clockSource = FST_RDB(card, suConfig.clocking);
1815 info->framing = FST_RDB(card, suConfig.framing);
1816 info->structure = FST_RDB(card, suConfig.structure);
1817 info->interface = FST_RDB(card, suConfig.interface);
1818 info->coding = FST_RDB(card, suConfig.coding);
1819 info->lineBuildOut = FST_RDB(card, suConfig.lineBuildOut);
1820 info->equalizer = FST_RDB(card, suConfig.equalizer);
1821 info->loopMode = FST_RDB(card, suConfig.loopMode);
1822 info->range = FST_RDB(card, suConfig.range);
1823 info->txBufferMode = FST_RDB(card, suConfig.txBufferMode);
1824 info->rxBufferMode = FST_RDB(card, suConfig.rxBufferMode);
1825 info->startingSlot = FST_RDB(card, suConfig.startingSlot);
1826 info->losThreshold = FST_RDB(card, suConfig.losThreshold);
1827 if (FST_RDB(card, suConfig.enableIdleCode))
1828 info->idleCode = FST_RDB(card, suConfig.idleCode);