Lines Matching refs:read_buf
626 u32 read_buf;
629 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
634 read_buf |= Tx_COE_EN_;
636 read_buf &= ~Tx_COE_EN_;
639 read_buf |= Rx_COE_EN_;
641 read_buf &= ~Rx_COE_EN_;
643 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
647 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
848 u32 read_buf, write_buf, burst_cap;
860 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
864 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
878 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
882 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
896 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
901 read_buf);
903 read_buf |= HW_CFG_BIR_;
905 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
909 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
915 read_buf);
935 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
941 read_buf);
947 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
953 read_buf);
955 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
960 read_buf);
963 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
965 read_buf &= ~HW_CFG_RXDOFF_;
968 read_buf |= NET_IP_ALIGN << 9;
970 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
974 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
979 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
985 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
988 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
1026 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
1031 read_buf |= INT_EP_CTL_PHY_INT_;
1033 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);