Lines Matching refs:reg8

483 	u8 reg8 = 0;
485 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
486 	vlan_ctrl = reg8;
489 	reg8 = (vid / 16);
490 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, &reg8);
492 	reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD;
493 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
497 	reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE;
498 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
508 	u8 reg8 = 0;
510 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
511 	vlan_ctrl = reg8;
514 	reg8 = (vid / 16);
515 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, &reg8);
517 	reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD;
518 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
522 	reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE;
523 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
572 	u8 reg8 = 0;
575 		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);
576 		reg8 ^= SFR_TXCOE_TCP | SFR_TXCOE_UDP;
578 				 1, 1, &reg8);
582 		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);
583 		reg8 ^= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6;
585 				 1, 1, &reg8);
589 		aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, &reg8);
592 			reg8 &= ~(SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
596 			reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
601 				 1, 1, &reg8);
609 				reg8 = i;
612 						 1, 1, &reg8);
617 				reg8 = SFR_VLAN_CONTROL_WE;
620 						 1, 1, &reg8);
623 					1, 1, &reg8);
624 			reg8 |= SFR_VLAN_CONTROL_VFE;
626 					 SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
629 					1, 1, &reg8);
630 			reg8 &= ~SFR_VLAN_CONTROL_VFE;
632 					 SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
808 	u8 reg8 = 0;
816 		reg8 = 0x05;
837 			 1, 1, &reg8);
882 	u8 reg8 = 0;
885 		reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
888 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, &reg8);
890 	reg8 = 0;
892 		reg8 |= SFR_TXCOE_IP | SFR_TXCOE_TCP | SFR_TXCOE_UDP;
895 		reg8 |= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6;
897 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);
904 	u8 reg8 = 0;
910 		reg8 = SFR_VLAN_CONTROL_VSO;
912 			reg8 |= SFR_VLAN_CONTROL_VFE;
915 				 1, 1, &reg8);
917 		reg8 = 0x0;
919 				 1, 1, &reg8);
922 				 1, 1, &reg8);
924 		aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ARC_CTRL, 1, 1, &reg8);
930 		reg8 = SFR_RX_PATH_READY;
932 				 1, 1, &reg8);
934 		reg8 = SFR_BULK_OUT_EFF_EN;
936 				 1, 1, &reg8);
977 		reg8 = SFR_BULK_OUT_FLUSH_EN | SFR_BULK_OUT_EFF_EN;
979 				 1, 1, &reg8);
980 		reg8 = SFR_BULK_OUT_EFF_EN;
982 				 1, 1, &reg8);
992 	u8 reg8 = 0;
1012 	reg8 = 0xFF;
1013 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, 1, 1, &reg8);
1015 	reg8 = 0x0;
1016 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_SWP_CTRL, 1, 1, &reg8);
1018 	aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);
1019 	reg8 &= ~(SFR_MONITOR_MODE_EPHYRW | SFR_MONITOR_MODE_RWLC |
1022 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);
1329 	u8 reg8;
1345 	reg8 = SFR_BULK_OUT_EFF_EN;
1347 			      1, 1, &reg8);
1354 	reg8 = 0x00;
1356 			      1, 1, &reg8);
1370 		reg8 = 0x00;
1372 				      1, 1, &reg8);
1373 		reg8 = SFR_BMRX_DMA_EN;
1375 				      1, 1, &reg8);
1376 		reg8 = SFR_RX_PATH_READY;
1378 				      1, 1, &reg8);
1379 		reg8 = 0x07;
1381 				      1, 1, &reg8);
1382 		reg8 = 0x00;
1384 				      SFR_RX_BULKIN_QTIMR_LOW, 1, 1, &reg8);
1386 				      SFR_RX_BULKIN_QTIMR_HIGH, 1, 1, &reg8);
1387 		reg8 = 0xFF;
1389 				      1, 1, &reg8);
1391 				      1, 1, &reg8);
1424 	u8 reg8;
1433 	reg8 = 0xFF;
1435 			      1, 1, &reg8);
1452 	reg8 = SFR_RX_PATH_READY;
1454 			      1, 1, &reg8);
1455 	reg8 = 0x0;
1456 	aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL, 1, 1, &reg8);