Lines Matching defs:phydev
78 static int vsc824x_add_skew(struct phy_device *phydev)
83 extcon = phy_read(phydev, MII_VSC8244_EXT_CON1);
94 err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon);
99 static int vsc824x_config_init(struct phy_device *phydev)
103 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
108 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
109 err = vsc824x_add_skew(phydev);
116 static int vsc73xx_read_page(struct phy_device *phydev)
118 return __phy_read(phydev, VSC73XX_EXT_PAGE_ACCESS);
121 static int vsc73xx_write_page(struct phy_device *phydev, int page)
123 return __phy_write(phydev, VSC73XX_EXT_PAGE_ACCESS, page);
126 static void vsc73xx_config_init(struct phy_device *phydev)
129 phy_write(phydev, 0x1f, 0x2a30);
130 phy_modify(phydev, 0x0c, 0x0300, 0x0200);
131 phy_write(phydev, 0x1f, 0x0000);
134 phy_modify(phydev, MII_TPISTATUS, 0xff00, 0x0061);
137 static int vsc738x_config_init(struct phy_device *phydev)
145 phy_write(phydev, 0x1f, 0x2a30);
146 phy_modify(phydev, 0x08, 0x0200, 0x0200);
147 phy_write(phydev, 0x1f, 0x52b5);
148 phy_write(phydev, 0x10, 0xb68a);
149 phy_modify(phydev, 0x12, 0xff07, 0x0003);
150 phy_modify(phydev, 0x11, 0x00ff, 0x00a2);
151 phy_write(phydev, 0x10, 0x968a);
152 phy_write(phydev, 0x1f, 0x2a30);
153 phy_modify(phydev, 0x08, 0x0200, 0x0000);
154 phy_write(phydev, 0x1f, 0x0000);
157 rev = phy_read(phydev, MII_PHYSID2);
162 phy_write(phydev, 0x1f, 0x2a30);
163 phy_modify(phydev, 0x08, 0x0200, 0x0200);
164 phy_write(phydev, 0x1f, 0x52b5);
165 phy_write(phydev, 0x12, 0x0000);
166 phy_write(phydev, 0x11, 0x0689);
167 phy_write(phydev, 0x10, 0x8f92);
168 phy_write(phydev, 0x1f, 0x52b5);
169 phy_write(phydev, 0x12, 0x0000);
170 phy_write(phydev, 0x11, 0x0e35);
171 phy_write(phydev, 0x10, 0x9786);
172 phy_write(phydev, 0x1f, 0x2a30);
173 phy_modify(phydev, 0x08, 0x0200, 0x0000);
174 phy_write(phydev, 0x17, 0xff80);
175 phy_write(phydev, 0x17, 0x0000);
178 phy_write(phydev, 0x1f, 0x0000);
179 phy_write(phydev, 0x12, 0x0048);
182 phy_write(phydev, 0x1f, 0x2a30);
183 phy_write(phydev, 0x14, 0x6600);
184 phy_write(phydev, 0x1f, 0x0000);
185 phy_write(phydev, 0x18, 0xa24e);
187 phy_write(phydev, 0x1f, 0x2a30);
188 phy_modify(phydev, 0x16, 0x0fc0, 0x0240);
189 phy_modify(phydev, 0x14, 0x6000, 0x4000);
193 phy_write(phydev, 0x1f, 0x0001);
194 phy_modify(phydev, 0x14, 0xe000, 0x6000);
195 phy_write(phydev, 0x1f, 0x0000);
198 vsc73xx_config_init(phydev);
203 static int vsc739x_config_init(struct phy_device *phydev)
210 phy_write(phydev, 0x1f, 0x2a30);
211 phy_modify(phydev, 0x08, 0x0200, 0x0200);
212 phy_write(phydev, 0x1f, 0x52b5);
213 phy_write(phydev, 0x10, 0xb68a);
214 phy_modify(phydev, 0x12, 0xff07, 0x0003);
215 phy_modify(phydev, 0x11, 0x00ff, 0x00a2);
216 phy_write(phydev, 0x10, 0x968a);
217 phy_write(phydev, 0x1f, 0x2a30);
218 phy_modify(phydev, 0x08, 0x0200, 0x0000);
219 phy_write(phydev, 0x1f, 0x0000);
221 phy_write(phydev, 0x1f, 0x0000);
222 phy_write(phydev, 0x12, 0x0048);
223 phy_write(phydev, 0x1f, 0x2a30);
224 phy_modify(phydev, 0x16, 0x0fc0, 0x0240);
225 phy_modify(phydev, 0x14, 0x6000, 0x4000);
226 phy_write(phydev, 0x1f, 0x0001);
227 phy_modify(phydev, 0x14, 0xe000, 0x6000);
228 phy_write(phydev, 0x1f, 0x0000);
230 vsc73xx_config_init(phydev);
235 static int vsc73xx_config_aneg(struct phy_device *phydev)
248 static int vsc8601_add_skew(struct phy_device *phydev)
252 ret = phy_read(phydev, MII_VSC8601_EPHY_CTL);
257 return phy_write(phydev, MII_VSC8601_EPHY_CTL, ret);
260 static int vsc8601_config_init(struct phy_device *phydev)
264 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
265 ret = vsc8601_add_skew(phydev);
273 static int vsc824x_ack_interrupt(struct phy_device *phydev)
281 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
282 err = phy_read(phydev, MII_VSC8244_ISTAT);
287 static int vsc82xx_config_intr(struct phy_device *phydev)
291 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
292 err = phy_write(phydev, MII_VSC8244_IMASK,
293 (phydev->drv->phy_id == PHY_ID_VSC8234 ||
294 phydev->drv->phy_id == PHY_ID_VSC8244 ||
295 phydev->drv->phy_id == PHY_ID_VSC8572 ||
296 phydev->drv->phy_id == PHY_ID_VSC8601) ?
303 err = phy_read(phydev, MII_VSC8244_ISTAT);
308 err = phy_write(phydev, MII_VSC8244_IMASK, 0);
314 static int vsc8221_config_init(struct phy_device *phydev)
318 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
328 * @phydev: target phy_device struct
333 static int vsc82x4_config_autocross_enable(struct phy_device *phydev)
337 if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed > SPEED_100)
341 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x52b5);
343 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_18E, 0x0012);
345 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_17E, 0x2803);
347 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_16E, 0x87fa);
350 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x0000);
352 phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x0000);
358 * @phydev: target phy_device struct
365 static int vsc82x4_config_aneg(struct phy_device *phydev)
372 if (phydev->autoneg != AUTONEG_ENABLE && phydev->speed <= SPEED_100) {
373 ret = genphy_setup_forced(phydev);
378 return vsc82x4_config_autocross_enable(phydev);
381 return genphy_config_aneg(phydev);