Lines Matching refs:val
194 u16 val;
205 val = enable ? MV_V2_TEMP_CTRL_SAMPLE : MV_V2_TEMP_CTRL_DISABLE;
208 MV_V2_TEMP_CTRL_MASK, val);
283 int val, err;
291 unit + MDIO_CTRL1, val,
292 !(val & MDIO_CTRL1_RESET),
298 int val;
300 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1);
301 if (val < 0)
302 return val;
304 switch (val & MV_PCS_CSCR1_ED_MASK) {
320 u16 val;
326 val = MV_PCS_CSCR1_ED_NLP;
330 val = MV_PCS_CSCR1_ED_RX;
334 val = MV_PCS_CSCR1_ED_OFF;
342 MV_PCS_CSCR1_ED_MASK, val);
467 int val;
484 val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL);
485 if (val < 0)
486 return val;
487 priv->rate_match = ((val & MV_V2_PORT_MAC_TYPE_MASK) ==
496 int ret, val;
503 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
505 if (val < 0)
506 return val;
510 val & MDIO_PMA_NG_EXTABLE_2_5GBT);
514 val & MDIO_PMA_NG_EXTABLE_5GBT);
522 u16 val;
527 val = MV_PCS_CSCR1_MDIX_AUTO;
530 val = MV_PCS_CSCR1_MDIX_MDIX;
533 val = MV_PCS_CSCR1_MDIX_MDI;
540 MV_PCS_CSCR1_MDIX_MASK, val);
582 int val;
584 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_BASE_R + MDIO_STAT1);
585 if (val < 0)
586 return val;
588 if (val & MDIO_STAT1_LSTATUS)
648 int cssr1, speed, val;
650 val = genphy_c45_read_link(phydev);
651 if (val < 0)
652 return val;
654 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
655 if (val < 0)
656 return val;
705 if (val & MDIO_AN_STAT1_COMPLETE) {
706 val = genphy_c45_read_lpa(phydev);
707 if (val < 0)
708 return val;
711 val = phy_read_mmd(phydev, MDIO_MMD_AN, MV_AN_STAT1000);
712 if (val < 0)
713 return val;
715 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
726 int err, val;
736 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_BASE_R + MDIO_STAT1);
737 if (val < 0)
738 return val;
740 if (val & MDIO_STAT1_LSTATUS)