Lines Matching refs:dp83869
16 #include <dt-bindings/net/ti-dp83869.h>
157 struct dp83869_private *dp83869 = phydev->priv;
166 if (dp83869->mode == DP83869_RGMII_100_BASE)
462 struct dp83869_private *dp83869 = phydev->priv;
464 if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN)
476 struct dp83869_private *dp83869 = phydev->priv;
483 dp83869->mode = val & DP83869_STRAP_OP_MODE_MASK;
495 struct dp83869_private *dp83869 = phydev->priv;
504 dp83869->io_impedance = -EINVAL;
508 &dp83869->clk_output_sel);
509 if (ret || dp83869->clk_output_sel > DP83869_CLK_O_SEL_REF_CLK)
510 dp83869->clk_output_sel = DP83869_CLK_O_SEL_REF_CLK;
512 ret = of_property_read_u32(of_node, "ti,op-mode", &dp83869->mode);
514 if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
515 dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
524 dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX;
526 dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN;
529 dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
537 dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
539 dp83869->port_mirroring = DP83869_PORT_MIRRORING_DIS;
545 &dp83869->rx_fifo_depth))
546 dp83869->rx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;
549 &dp83869->tx_fifo_depth))
550 dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;
552 dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev,
555 if (dp83869->rx_int_delay < 0)
556 dp83869->rx_int_delay = DP83869_CLK_DELAY_DEF;
558 dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev,
561 if (dp83869->tx_int_delay < 0)
562 dp83869->tx_int_delay = DP83869_CLK_DELAY_DEF;
574 struct dp83869_private *dp83869)
584 val |= (dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT);
585 val |= (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT);
592 if (dp83869->io_impedance >= 0)
596 dp83869->io_impedance &
603 struct dp83869_private *dp83869)
615 if (dp83869->mode == DP83869_RGMII_1000_BASE) {
648 struct dp83869_private *dp83869)
653 if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
654 dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
661 dp83869->mode);
669 phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT |
670 dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT |
673 switch (dp83869->mode) {
684 ret = dp83869_configure_rgmii(phydev, dp83869);
736 ret = dp83869_configure_fiber(phydev, dp83869);
747 struct dp83869_private *dp83869 = phydev->priv;
756 ret = dp83869_configure_mode(phydev, dp83869);
767 if (dp83869->port_mirroring != DP83869_PORT_MIRRORING_KEEP)
771 if (dp83869->clk_output_sel != DP83869_CLK_O_SEL_REF_CLK)
775 dp83869->clk_output_sel <<
780 dp83869->rx_int_delay |
781 dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT);
808 struct dp83869_private *dp83869;
811 dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869),
813 if (!dp83869)
816 phydev->priv = dp83869;
822 if (dp83869->mode == DP83869_RGMII_100_BASE ||
823 dp83869->mode == DP83869_RGMII_1000_BASE)