Lines Matching defs:DP83869_DEVADDR
19 #define DP83869_DEVADDR 0x1f
218 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
238 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
244 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
250 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
262 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
268 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
273 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
298 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg);
314 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
330 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
340 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
350 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
465 return phy_set_bits_mmd(phydev, DP83869_DEVADDR,
469 return phy_clear_bits_mmd(phydev, DP83869_DEVADDR,
479 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
532 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
593 ret = phy_modify_mmd(phydev, DP83869_DEVADDR,
660 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
689 ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
695 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
707 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
728 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
773 DP83869_DEVADDR, DP83869_IO_MUX_CFG,
779 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL,
785 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL);
799 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL,