Lines Matching defs:DP83867_DEVADDR
21 #define DP83867_DEVADDR 0x1f
189 val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG);
203 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD1,
205 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD2,
207 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD3,
216 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP1,
218 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP2,
220 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP3,
242 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG, val_rxcfg);
257 value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG);
269 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
274 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
279 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
441 phy_set_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
444 phy_clear_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
457 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR,
626 phy_clear_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
629 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2);
635 ret = phy_modify_mmd(phydev, DP83867_DEVADDR,
679 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1);
694 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL);
706 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val);
715 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL,
721 phy_modify_mmd(phydev, DP83867_DEVADDR, DP83867_IO_MUX_CFG,
732 ret = phy_modify_mmd(phydev, DP83867_DEVADDR,
743 ret = phy_modify_mmd(phydev, DP83867_DEVADDR,
751 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL);
760 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL, val);
767 phy_set_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
794 phy_modify_mmd(phydev, DP83867_DEVADDR, DP83867_IO_MUX_CFG,
820 err = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_DSP_FFE_CFG,