Lines Matching defs:DP83822_DEVADDR
24 #define DP83822_DEVADDR 0x1f
153 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA1,
155 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA2,
157 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA3,
160 value = phy_read_mmd(phydev, DP83822_DEVADDR,
168 phy_write_mmd(phydev, DP83822_DEVADDR,
171 phy_write_mmd(phydev, DP83822_DEVADDR,
174 phy_write_mmd(phydev, DP83822_DEVADDR,
188 return phy_write_mmd(phydev, DP83822_DEVADDR,
191 return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
205 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);
211 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,
216 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,
221 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,
307 return phy_clear_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
384 err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,
439 err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,
497 val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1);
544 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);
558 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);
560 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, value |