Lines Matching refs:dp83640
220 struct dp83640_private *dp83640 = phydev->priv;
223 if (dp83640->clock->page != page) {
225 dp83640->clock->page = page;
236 struct dp83640_private *dp83640 = phydev->priv;
238 if (dp83640->clock->page != page) {
240 dp83640->clock->page = page;
299 struct dp83640_private *dp83640 = clock->chosen;
300 struct phy_device *phydev = dp83640->phydev;
543 struct dp83640_private *dp83640 = phydev->priv;
544 struct dp83640_clock *clock = dp83640->clock;
591 static void prune_rx_ts(struct dp83640_private *dp83640)
596 list_for_each_safe(this, next, &dp83640->rxts) {
600 list_add(&rxts->list, &dp83640->rxpool);
740 static int decode_evnt(struct dp83640_private *dp83640,
768 dp83640->edata.sec_hi = phy_txts->sec_hi;
771 dp83640->edata.sec_lo = phy_txts->sec_lo;
774 dp83640->edata.ns_hi = phy_txts->ns_hi;
777 dp83640->edata.ns_lo = phy_txts->ns_lo;
786 event.timestamp = phy2txts(&dp83640->edata);
794 ptp_clock_event(dp83640->clock->ptp_clock, &event);
833 static void decode_rxts(struct dp83640_private *dp83640,
846 spin_lock_irqsave(&dp83640->rx_lock, flags);
848 prune_rx_ts(dp83640);
850 if (list_empty(&dp83640->rxpool)) {
854 rxts = list_first_entry(&dp83640->rxpool, struct rxts, list);
858 spin_lock(&dp83640->rx_queue.lock);
859 skb_queue_walk(&dp83640->rx_queue, skb) {
864 __skb_unlink(skb, &dp83640->rx_queue);
868 list_add(&rxts->list, &dp83640->rxpool);
872 spin_unlock(&dp83640->rx_queue.lock);
875 list_add_tail(&rxts->list, &dp83640->rxts);
877 spin_unlock_irqrestore(&dp83640->rx_lock, flags);
883 static void decode_txts(struct dp83640_private *dp83640,
894 skb = skb_dequeue(&dp83640->tx_queue);
905 skb = skb_dequeue(&dp83640->tx_queue);
921 static void decode_status_frame(struct dp83640_private *dp83640,
943 decode_rxts(dp83640, phy_rxts);
949 decode_txts(dp83640, phy_txts);
954 size = decode_evnt(dp83640, ptr, len, ests);
1010 sprintf(clock->caps.name, "dp83640 timer");
1117 struct dp83640_private *dp83640 = phydev->priv;
1118 struct dp83640_clock *clock = dp83640->clock;
1198 struct dp83640_private *dp83640 =
1212 dp83640->hwts_tx_en = cfg.tx_type;
1216 dp83640->hwts_rx_en = 0;
1217 dp83640->layer = 0;
1218 dp83640->version = 0;
1223 dp83640->hwts_rx_en = 1;
1224 dp83640->layer = PTP_CLASS_L4;
1225 dp83640->version = PTP_CLASS_V1;
1231 dp83640->hwts_rx_en = 1;
1232 dp83640->layer = PTP_CLASS_L4;
1233 dp83640->version = PTP_CLASS_V2;
1239 dp83640->hwts_rx_en = 1;
1240 dp83640->layer = PTP_CLASS_L2;
1241 dp83640->version = PTP_CLASS_V2;
1247 dp83640->hwts_rx_en = 1;
1248 dp83640->layer = PTP_CLASS_L4 | PTP_CLASS_L2;
1249 dp83640->version = PTP_CLASS_V2;
1256 txcfg0 = (dp83640->version & TX_PTP_VER_MASK) << TX_PTP_VER_SHIFT;
1257 rxcfg0 = (dp83640->version & TX_PTP_VER_MASK) << TX_PTP_VER_SHIFT;
1259 if (dp83640->layer & PTP_CLASS_L2) {
1263 if (dp83640->layer & PTP_CLASS_L4) {
1268 if (dp83640->hwts_tx_en)
1271 if (dp83640->hwts_tx_en == HWTSTAMP_TX_ONESTEP_SYNC)
1274 if (dp83640->hwts_rx_en)
1277 mutex_lock(&dp83640->clock->extreg_lock);
1279 ext_write(0, dp83640->phydev, PAGE5, PTP_TXCFG0, txcfg0);
1280 ext_write(0, dp83640->phydev, PAGE5, PTP_RXCFG0, rxcfg0);
1282 mutex_unlock(&dp83640->clock->extreg_lock);
1289 struct dp83640_private *dp83640 =
1294 while ((skb = skb_dequeue(&dp83640->rx_queue))) {
1299 skb_queue_head(&dp83640->rx_queue, skb);
1306 if (!skb_queue_empty(&dp83640->rx_queue))
1307 schedule_delayed_work(&dp83640->ts_work, SKB_TIMESTAMP_TIMEOUT);
1313 struct dp83640_private *dp83640 =
1322 decode_status_frame(dp83640, skb);
1327 if (!dp83640->hwts_rx_en)
1330 if ((type & dp83640->version) == 0 || (type & dp83640->layer) == 0)
1333 spin_lock_irqsave(&dp83640->rx_lock, flags);
1334 prune_rx_ts(dp83640);
1335 list_for_each_safe(this, next, &dp83640->rxts) {
1342 list_add(&rxts->list, &dp83640->rxpool);
1346 spin_unlock_irqrestore(&dp83640->rx_lock, flags);
1351 skb_queue_tail(&dp83640->rx_queue, skb);
1352 schedule_delayed_work(&dp83640->ts_work, SKB_TIMESTAMP_TIMEOUT);
1364 struct dp83640_private *dp83640 =
1367 switch (dp83640->hwts_tx_en) {
1378 skb_queue_tail(&dp83640->tx_queue, skb);
1391 struct dp83640_private *dp83640 =
1398 info->phc_index = ptp_clock_index(dp83640->clock->ptp_clock);
1415 struct dp83640_private *dp83640;
1425 dp83640 = kzalloc(sizeof(struct dp83640_private), GFP_KERNEL);
1426 if (!dp83640)
1429 dp83640->phydev = phydev;
1430 dp83640->mii_ts.rxtstamp = dp83640_rxtstamp;
1431 dp83640->mii_ts.txtstamp = dp83640_txtstamp;
1432 dp83640->mii_ts.hwtstamp = dp83640_hwtstamp;
1433 dp83640->mii_ts.ts_info = dp83640_ts_info;
1435 INIT_DELAYED_WORK(&dp83640->ts_work, rx_timestamp_work);
1436 INIT_LIST_HEAD(&dp83640->rxts);
1437 INIT_LIST_HEAD(&dp83640->rxpool);
1439 list_add(&dp83640->rx_pool_data[i].list, &dp83640->rxpool);
1441 phydev->mii_ts = &dp83640->mii_ts;
1442 phydev->priv = dp83640;
1444 spin_lock_init(&dp83640->rx_lock);
1445 skb_queue_head_init(&dp83640->rx_queue);
1446 skb_queue_head_init(&dp83640->tx_queue);
1448 dp83640->clock = clock;
1451 clock->chosen = dp83640;
1459 list_add_tail(&dp83640->list, &clock->phylist);
1466 kfree(dp83640);
1477 struct dp83640_private *tmp, *dp83640 = phydev->priv;
1485 cancel_delayed_work_sync(&dp83640->ts_work);
1487 skb_queue_purge(&dp83640->rx_queue);
1488 skb_queue_purge(&dp83640->tx_queue);
1490 clock = dp83640_clock_get(dp83640->clock);
1492 if (dp83640 == clock->chosen) {
1498 if (tmp == dp83640) {
1506 kfree(dp83640);