Lines Matching refs:ETH_PLL_CTL0
19 #define ETH_PLL_CTL0 0x44
77 val = readl(pll->base + ETH_PLL_CTL0);
87 u32 val = readl(pll->base + ETH_PLL_CTL0);
91 writel(val, pll->base + ETH_PLL_CTL0);
95 writel(val, pll->base + ETH_PLL_CTL0);
102 return readl_poll_timeout(pll->base + ETH_PLL_CTL0, val,
111 val = readl(pll->base + ETH_PLL_CTL0);
114 writel(val, pll->base + ETH_PLL_CTL0);
122 val = readl(pll->base + ETH_PLL_CTL0);
132 writel(0x29c0040a, pll->base + ETH_PLL_CTL0);
269 mux->reg = priv->regs + ETH_PLL_CTL0;