Lines Matching refs:base
51 void __iomem *base;
63 val = readl(md->base + MDIO_SCAN_CTRL_OFFSET);
65 writel(val, md->base + MDIO_SCAN_CTRL_OFFSET);
75 writel(val, md->base + MDIO_RATE_ADJ_EXT_OFFSET);
76 writel(val, md->base + MDIO_RATE_ADJ_INT_OFFSET);
80 static int iproc_mdio_wait_for_idle(void __iomem *base, bool result)
84 return readl_poll_timeout(base + MDIO_STAT_OFFSET, val,
90 * @base: Base address
101 static int start_miim_ops(void __iomem *base,
107 writel(0, base + MDIO_CTRL_OFFSET);
108 ret = iproc_mdio_wait_for_idle(base, 0);
112 param = readl(base + MDIO_PARAM_OFFSET);
118 writel(param, base + MDIO_PARAM_OFFSET);
120 writel(reg, base + MDIO_ADDR_OFFSET);
122 writel(op, base + MDIO_CTRL_OFFSET);
124 ret = iproc_mdio_wait_for_idle(base, 1);
129 ret = readl(base + MDIO_READ_OFFSET) & MDIO_READ_DATA_MASK;
139 ret = start_miim_ops(md->base, phyid, reg, 0, MDIO_CTRL_READ_OP);
153 ret = start_miim_ops(md->base, phyid, reg, val, MDIO_CTRL_WRITE_OP);
174 writel(param, md->base + MDIO_PARAM_OFFSET);
193 * base address is specified with an offset.
195 dev_info(&pdev->dev, "fix base address in dt-blob\n");
199 md->base = devm_ioremap_resource(&pdev->dev, res);
200 if (IS_ERR(md->base)) {
202 return PTR_ERR(md->base);