Lines Matching defs:val
45 #define mscc_readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \
48 readl_poll_timeout_atomic(addr, val, cond, delay_us, \
50 readl_poll_timeout(addr, val, cond, delay_us, timeout_us); \
56 u32 val;
58 return mscc_readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,
59 !(val & MSCC_MIIM_STATUS_STAT_BUSY), 50,
66 u32 val;
68 return mscc_readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,
69 !(val & MSCC_MIIM_STATUS_STAT_PENDING),
76 u32 val;
94 val = readl(miim->regs + MSCC_MIIM_REG_DATA);
95 if (val & MSCC_MIIM_DATA_ERROR) {
100 ret = val & 0xFFFF;