Lines Matching refs:rrpriv
91 struct rr_private *rrpriv;
106 rrpriv = netdev_priv(dev);
116 rrpriv->pci_dev = pdev;
118 spin_lock_init(&rrpriv->lock);
146 rrpriv->regs = pci_iomap(pdev, 0, 0x1000);
147 if (!rrpriv->regs) {
156 rrpriv->tx_ring = tmpptr;
157 rrpriv->tx_ring_dma = ring_dma;
166 rrpriv->rx_ring = tmpptr;
167 rrpriv->rx_ring_dma = ring_dma;
176 rrpriv->evt_ring = tmpptr;
177 rrpriv->evt_ring_dma = ring_dma;
188 writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
189 &rrpriv->regs->HostCtrl);
203 if (rrpriv->evt_ring)
204 dma_free_coherent(&pdev->dev, EVT_RING_SIZE, rrpriv->evt_ring,
205 rrpriv->evt_ring_dma);
206 if (rrpriv->rx_ring)
207 dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, rrpriv->rx_ring,
208 rrpriv->rx_ring_dma);
209 if (rrpriv->tx_ring)
210 dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, rrpriv->tx_ring,
211 rrpriv->tx_ring_dma);
212 if (rrpriv->regs)
213 pci_iounmap(pdev, rrpriv->regs);
251 static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
256 regs = rrpriv->regs;
269 idx = rrpriv->info->cmd_ctrl.pi;
275 rrpriv->info->cmd_ctrl.pi = idx;
289 struct rr_private *rrpriv;
294 rrpriv = netdev_priv(dev);
295 regs = rrpriv->regs;
366 rrpriv->info->evt_ctrl.pi = 0;
377 start_pc = rr_read_eeprom_word(rrpriv,
399 static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
404 struct rr_regs __iomem *regs = rrpriv->regs;
434 static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
439 if ((rr_read_eeprom(rrpriv, offset,
451 static unsigned int write_eeprom(struct rr_private *rrpriv,
456 struct rr_regs __iomem *regs = rrpriv->regs;
505 struct rr_private *rrpriv;
509 rrpriv = netdev_priv(dev);
510 regs = rrpriv->regs;
513 rrpriv->fw_rev = rev;
541 htons(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA)));
543 htonl(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA[4])));
547 sram_size = rr_read_eeprom_word(rrpriv, 8);
556 struct rr_private *rrpriv;
564 rrpriv = netdev_priv(dev);
565 regs = rrpriv->regs;
567 spin_lock_irqsave(&rrpriv->lock, flags);
576 spin_unlock_irqrestore(&rrpriv->lock, flags);
581 set_rxaddr(regs, rrpriv->rx_ctrl_dma);
582 set_infoaddr(regs, rrpriv->info_dma);
584 rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
585 rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
586 rrpriv->info->evt_ctrl.mode = 0;
587 rrpriv->info->evt_ctrl.pi = 0;
588 set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
590 rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
591 rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
592 rrpriv->info->cmd_ctrl.mode = 0;
593 rrpriv->info->cmd_ctrl.pi = 15;
600 rrpriv->tx_ring[i].size = 0;
601 set_rraddr(&rrpriv->tx_ring[i].addr, 0);
602 rrpriv->tx_skbuff[i] = NULL;
604 rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
605 rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
606 rrpriv->info->tx_ctrl.mode = 0;
607 rrpriv->info->tx_ctrl.pi = 0;
608 set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
616 rrpriv->tx_full = 0;
617 rrpriv->cur_rx = 0;
618 rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
632 rrpriv->fw_running = 0;
639 spin_unlock_irqrestore(&rrpriv->lock, flags);
645 rrpriv->rx_ring[i].mode = 0;
653 rrpriv->rx_skbuff[i] = skb;
654 addr = dma_map_single(&rrpriv->pci_dev->dev, skb->data,
663 set_rraddr(&rrpriv->rx_ring[i].addr, addr);
664 rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
667 rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
668 rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
669 rrpriv->rx_ctrl[4].mode = 8;
670 rrpriv->rx_ctrl[4].pi = 0;
672 set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
683 rr_issue_cmd(rrpriv, &cmd);
689 while (time_before(jiffies, myjif) && !rrpriv->fw_running)
702 struct sk_buff *skb = rrpriv->rx_skbuff[i];
705 dma_unmap_single(&rrpriv->pci_dev->dev,
706 rrpriv->rx_ring[i].addr.addrlo,
709 rrpriv->rx_ring[i].size = 0;
710 set_rraddr(&rrpriv->rx_ring[i].addr, 0);
712 rrpriv->rx_skbuff[i] = NULL;
726 struct rr_private *rrpriv;
730 rrpriv = netdev_priv(dev);
731 regs = rrpriv->regs;
734 switch (rrpriv->evt_ring[eidx].code){
740 rrpriv->fw_running = 1;
907 u16 index = rrpriv->evt_ring[eidx].index;
910 rrpriv->rx_ring[index].mode |=
916 dev->name, rrpriv->evt_ring[eidx].code);
921 rrpriv->info->evt_ctrl.pi = eidx;
929 struct rr_private *rrpriv = netdev_priv(dev);
930 struct rr_regs __iomem *regs = rrpriv->regs;
936 desc = &(rrpriv->rx_ring[index]);
942 if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
950 rx_skb = rrpriv->rx_skbuff[index];
959 dma_sync_single_for_cpu(&rrpriv->pci_dev->dev,
967 dma_sync_single_for_device(&rrpriv->pci_dev->dev,
980 dma_unmap_single(&rrpriv->pci_dev->dev,
986 rrpriv->rx_skbuff[index] = newskb;
987 addr = dma_map_single(&rrpriv->pci_dev->dev,
1016 rrpriv->cur_rx = index;
1023 struct rr_private *rrpriv;
1028 rrpriv = netdev_priv(dev);
1029 regs = rrpriv->regs;
1034 spin_lock(&rrpriv->lock);
1043 prodidx, rrpriv->info->evt_ctrl.pi);
1051 eidx = rrpriv->info->evt_ctrl.pi;
1055 rxindex = rrpriv->cur_rx;
1059 txcon = rrpriv->dirty_tx;
1065 if(rrpriv->tx_skbuff[txcon]){
1069 desc = &(rrpriv->tx_ring[txcon]);
1070 skb = rrpriv->tx_skbuff[txcon];
1075 dma_unmap_single(&rrpriv->pci_dev->dev,
1080 rrpriv->tx_skbuff[txcon] = NULL;
1082 set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
1089 rrpriv->dirty_tx = txcon;
1090 if (rrpriv->tx_full && rr_if_busy(dev) &&
1091 (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
1092 != rrpriv->dirty_tx)){
1093 rrpriv->tx_full = 0;
1102 spin_unlock(&rrpriv->lock);
1106 static inline void rr_raz_tx(struct rr_private *rrpriv,
1112 struct sk_buff *skb = rrpriv->tx_skbuff[i];
1115 struct tx_desc *desc = &(rrpriv->tx_ring[i]);
1117 dma_unmap_single(&rrpriv->pci_dev->dev,
1123 rrpriv->tx_skbuff[i] = NULL;
1129 static inline void rr_raz_rx(struct rr_private *rrpriv,
1135 struct sk_buff *skb = rrpriv->rx_skbuff[i];
1138 struct rx_desc *desc = &(rrpriv->rx_ring[i]);
1140 dma_unmap_single(&rrpriv->pci_dev->dev,
1147 rrpriv->rx_skbuff[i] = NULL;
1154 struct rr_private *rrpriv = from_timer(rrpriv, t, timer);
1155 struct net_device *dev = pci_get_drvdata(rrpriv->pci_dev);
1156 struct rr_regs __iomem *regs = rrpriv->regs;
1161 memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
1162 memset(rrpriv->info, 0, sizeof(struct rr_info));
1165 rr_raz_tx(rrpriv, dev);
1166 rr_raz_rx(rrpriv, dev);
1169 spin_lock_irqsave(&rrpriv->lock, flags);
1172 spin_unlock_irqrestore(&rrpriv->lock, flags);
1175 rrpriv->timer.expires = RUN_AT(5*HZ);
1176 add_timer(&rrpriv->timer);
1182 struct rr_private *rrpriv = netdev_priv(dev);
1183 struct pci_dev *pdev = rrpriv->pci_dev;
1189 regs = rrpriv->regs;
1191 if (rrpriv->fw_rev < 0x00020000) {
1198 rrpriv->rx_ctrl = dma_alloc_coherent(&pdev->dev,
1201 if (!rrpriv->rx_ctrl) {
1205 rrpriv->rx_ctrl_dma = dma_addr;
1207 rrpriv->info = dma_alloc_coherent(&pdev->dev, sizeof(struct rr_info),
1209 if (!rrpriv->info) {
1213 rrpriv->info_dma = dma_addr;
1216 spin_lock_irqsave(&rrpriv->lock, flags);
1219 spin_unlock_irqrestore(&rrpriv->lock, flags);
1233 timer_setup(&rrpriv->timer, rr_timer, 0);
1234 rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
1235 add_timer(&rrpriv->timer);
1242 spin_lock_irqsave(&rrpriv->lock, flags);
1244 spin_unlock_irqrestore(&rrpriv->lock, flags);
1246 if (rrpriv->info) {
1248 rrpriv->info, rrpriv->info_dma);
1249 rrpriv->info = NULL;
1251 if (rrpriv->rx_ctrl) {
1253 rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
1254 rrpriv->rx_ctrl = NULL;
1265 struct rr_private *rrpriv;
1271 rrpriv = netdev_priv(dev);
1272 regs = rrpriv->regs;
1279 rrpriv->info->tx_ctrl.pi);
1284 cons = rrpriv->dirty_tx;
1288 if (rrpriv->tx_skbuff[index]){
1289 len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
1290 printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
1294 printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
1299 if (rrpriv->tx_skbuff[cons]){
1300 len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
1301 printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
1303 rrpriv->tx_ring[cons].mode,
1304 rrpriv->tx_ring[cons].size,
1305 (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
1306 rrpriv->tx_skbuff[cons]->data,
1307 (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
1311 printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
1319 rrpriv->tx_ring[i].mode,
1320 rrpriv->tx_ring[i].size,
1321 (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
1328 struct rr_private *rrpriv = netdev_priv(dev);
1329 struct rr_regs __iomem *regs = rrpriv->regs;
1330 struct pci_dev *pdev = rrpriv->pci_dev;
1342 spin_lock_irqsave(&rrpriv->lock, flags);
1354 rrpriv->fw_running = 0;
1356 spin_unlock_irqrestore(&rrpriv->lock, flags);
1357 del_timer_sync(&rrpriv->timer);
1358 spin_lock_irqsave(&rrpriv->lock, flags);
1369 rrpriv->info->tx_ctrl.entries = 0;
1370 rrpriv->info->cmd_ctrl.pi = 0;
1371 rrpriv->info->evt_ctrl.pi = 0;
1372 rrpriv->rx_ctrl[4].entries = 0;
1374 rr_raz_tx(rrpriv, dev);
1375 rr_raz_rx(rrpriv, dev);
1378 rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
1379 rrpriv->rx_ctrl = NULL;
1381 dma_free_coherent(&pdev->dev, sizeof(struct rr_info), rrpriv->info,
1382 rrpriv->info_dma);
1383 rrpriv->info = NULL;
1385 spin_unlock_irqrestore(&rrpriv->lock, flags);
1395 struct rr_private *rrpriv = netdev_priv(dev);
1396 struct rr_regs __iomem *regs = rrpriv->regs;
1435 spin_lock_irqsave(&rrpriv->lock, flags);
1437 txctrl = &rrpriv->info->tx_ctrl;
1441 rrpriv->tx_skbuff[index] = skb;
1442 set_rraddr(&rrpriv->tx_ring[index].addr,
1443 dma_map_single(&rrpriv->pci_dev->dev, skb->data, len + 8, DMA_TO_DEVICE));
1444 rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
1445 rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
1450 if (txctrl->pi == rrpriv->dirty_tx){
1451 rrpriv->tx_full = 1;
1455 spin_unlock_irqrestore(&rrpriv->lock, flags);
1470 struct rr_private *rrpriv;
1477 rrpriv = netdev_priv(dev);
1478 regs = rrpriv->regs;
1503 sram_size = rr_read_eeprom_word(rrpriv, 8);
1514 eptr = rr_read_eeprom_word(rrpriv,
1518 p2len = rr_read_eeprom_word(rrpriv, 0x83*4);
1520 p2size = rr_read_eeprom_word(rrpriv, 0x84*4);
1528 revision = rr_read_eeprom_word(rrpriv,
1537 nr_seg = rr_read_eeprom_word(rrpriv, eptr);
1544 sptr = rr_read_eeprom_word(rrpriv, eptr);
1546 len = rr_read_eeprom_word(rrpriv, eptr);
1548 segptr = rr_read_eeprom_word(rrpriv, eptr);
1556 tmp = rr_read_eeprom_word(rrpriv, segptr);
1575 struct rr_private *rrpriv;
1581 rrpriv = netdev_priv(dev);
1593 if (rrpriv->fw_running){
1599 spin_lock_irqsave(&rrpriv->lock, flags);
1600 i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
1601 spin_unlock_irqrestore(&rrpriv->lock, flags);
1630 if (rrpriv->fw_running){
1638 spin_lock_irqsave(&rrpriv->lock, flags);
1639 error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
1644 i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
1645 spin_unlock_irqrestore(&rrpriv->lock, flags);