Lines Matching defs:smc
19 #include "h/smc.h"
39 static void build_claim_beacon(struct s_smc *smc, u_long t_request);
40 static int init_mac(struct s_smc *smc, int all);
41 static void rtm_init(struct s_smc *smc);
42 static void smt_split_up_fifo(struct s_smc *smc);
49 #define DUMMY_READ() smc->hw.mc_dummy = (u_short) inp(ADDR(B0_RAP))
54 SMT_PANIC(smc,SMT_E0130, SMT_E0130_MSG) ; \
61 SMT_PANIC(smc,SMT_E0131, SMT_E0131_MSG) ; \
76 #define MA smc->hw.fddi_canon_addr
78 #define MA smc->hw.fddi_home_addr
103 static u_long mac_get_tneg(struct s_smc *smc)
112 void mac_update_counter(struct s_smc *smc)
114 smc->mib.m[MAC0].fddiMACFrame_Ct =
115 (smc->mib.m[MAC0].fddiMACFrame_Ct & 0xffff0000L)
117 smc->mib.m[MAC0].fddiMACLost_Ct =
118 (smc->mib.m[MAC0].fddiMACLost_Ct & 0xffff0000L)
120 smc->mib.m[MAC0].fddiMACError_Ct =
121 (smc->mib.m[MAC0].fddiMACError_Ct & 0xffff0000L)
123 smc->mib.m[MAC0].fddiMACT_Neg = mac_get_tneg(smc) ;
130 smt_emulate_token_ct( smc, MAC0 );
137 static void write_mdr(struct s_smc *smc, u_long val)
147 static u_long read_mdr(struct s_smc *smc, unsigned int addr)
155 /* smc->hw.mc_dummy = *((short volatile far *)(addr)))*/
166 static void init_ram(struct s_smc *smc)
170 smc->hw.fp.fifo.rbc_ram_start = 0 ;
171 smc->hw.fp.fifo.rbc_ram_end =
172 smc->hw.fp.fifo.rbc_ram_start + RBC_MEM_SIZE ;
174 MARW(smc->hw.fp.fifo.rbc_ram_start) ;
175 for (i = smc->hw.fp.fifo.rbc_ram_start;
176 i < (u_short) (smc->hw.fp.fifo.rbc_ram_end-1); i++)
177 write_mdr(smc,0L) ;
179 write_mdr(smc,0L) ;
185 static void set_recvptr(struct s_smc *smc)
190 outpw(FM_A(FM_RPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* RPR1 */
191 outpw(FM_A(FM_SWPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* SWPR1 */
192 outpw(FM_A(FM_WPR1),smc->hw.fp.fifo.rx1_fifo_start) ; /* WPR1 */
193 outpw(FM_A(FM_EARV1),smc->hw.fp.fifo.tx_s_start-1) ; /* EARV1 */
198 if (smc->hw.fp.fifo.rx2_fifo_size) {
199 outpw(FM_A(FM_RPR2),smc->hw.fp.fifo.rx2_fifo_start) ;
200 outpw(FM_A(FM_SWPR2),smc->hw.fp.fifo.rx2_fifo_start) ;
201 outpw(FM_A(FM_WPR2),smc->hw.fp.fifo.rx2_fifo_start) ;
202 outpw(FM_A(FM_EARV2),smc->hw.fp.fifo.rbc_ram_end-1) ;
205 outpw(FM_A(FM_RPR2),smc->hw.fp.fifo.rbc_ram_end-1) ;
206 outpw(FM_A(FM_SWPR2),smc->hw.fp.fifo.rbc_ram_end-1) ;
207 outpw(FM_A(FM_WPR2),smc->hw.fp.fifo.rbc_ram_end-1) ;
208 outpw(FM_A(FM_EARV2),smc->hw.fp.fifo.rbc_ram_end-1) ;
215 static void set_txptr(struct s_smc *smc)
222 outpw(FM_A(FM_RPXA0),smc->hw.fp.fifo.tx_a0_start) ; /* RPXA0 */
223 outpw(FM_A(FM_SWPXA0),smc->hw.fp.fifo.tx_a0_start) ; /* SWPXA0 */
224 outpw(FM_A(FM_WPXA0),smc->hw.fp.fifo.tx_a0_start) ; /* WPXA0 */
225 outpw(FM_A(FM_EAA0),smc->hw.fp.fifo.rx2_fifo_start-1) ; /* EAA0 */
230 if (smc->hw.fp.fifo.tx_s_size) {
231 outpw(FM_A(FM_RPXS),smc->hw.fp.fifo.tx_s_start) ;
232 outpw(FM_A(FM_SWPXS),smc->hw.fp.fifo.tx_s_start) ;
233 outpw(FM_A(FM_WPXS),smc->hw.fp.fifo.tx_s_start) ;
234 outpw(FM_A(FM_EAS),smc->hw.fp.fifo.tx_a0_start-1) ;
237 outpw(FM_A(FM_RPXS),smc->hw.fp.fifo.tx_a0_start-1) ;
238 outpw(FM_A(FM_SWPXS),smc->hw.fp.fifo.tx_a0_start-1) ;
239 outpw(FM_A(FM_WPXS),smc->hw.fp.fifo.tx_a0_start-1) ;
240 outpw(FM_A(FM_EAS),smc->hw.fp.fifo.tx_a0_start-1) ;
247 static void init_rbc(struct s_smc *smc)
254 rbc_ram_addr = smc->hw.fp.fifo.rx2_fifo_start - 1 ;
261 set_recvptr(smc) ;
262 set_txptr(smc) ;
268 static void init_rx(struct s_smc *smc)
275 smc->hw.fp.rx[QUEUE_R1] = queue = &smc->hw.fp.rx_q[QUEUE_R1] ;
282 smc->hw.fp.rx[QUEUE_R2] = queue = &smc->hw.fp.rx_q[QUEUE_R2] ;
290 void set_formac_tsync(struct s_smc *smc, long sync_bw)
298 static void init_tx(struct s_smc *smc)
305 smc->hw.fp.tx[QUEUE_S] = queue = &smc->hw.fp.tx_q[QUEUE_S] ;
310 set_formac_tsync(smc,smc->ess.sync_bw) ;
316 smc->hw.fp.tx[QUEUE_A0] = queue = &smc->hw.fp.tx_q[QUEUE_A0] ;
321 llc_recover_tx(smc) ;
324 static void mac_counter_init(struct s_smc *smc)
338 ec = (u_long *)&smc->hw.fp.err_stats ;
341 smc->mib.m[MAC0].fddiMACRingOp_Ct = 0 ;
347 static void set_formac_addr(struct s_smc *smc)
349 long t_requ = smc->mib.m[MAC0].fddiMACT_Req ;
352 outpw(FM_A(FM_LAIL),(unsigned short)((smc->hw.fddi_home_addr.a[4]<<8) +
353 smc->hw.fddi_home_addr.a[5])) ;
354 outpw(FM_A(FM_LAIC),(unsigned short)((smc->hw.fddi_home_addr.a[2]<<8) +
355 smc->hw.fddi_home_addr.a[3])) ;
356 outpw(FM_A(FM_LAIM),(unsigned short)((smc->hw.fddi_home_addr.a[0]<<8) +
357 smc->hw.fddi_home_addr.a[1])) ;
361 outpw(FM_A(FM_LAGL),(unsigned short)((smc->hw.fp.group_addr.a[4]<<8) +
362 smc->hw.fp.group_addr.a[5])) ;
363 outpw(FM_A(FM_LAGC),(unsigned short)((smc->hw.fp.group_addr.a[2]<<8) +
364 smc->hw.fp.group_addr.a[3])) ;
365 outpw(FM_A(FM_LAGM),(unsigned short)((smc->hw.fp.group_addr.a[0]<<8) +
366 smc->hw.fp.group_addr.a[1])) ;
389 static void copy_tx_mac(struct s_smc *smc, u_long td, struct fddi_mac *mac,
408 write_mdr(smc,le32_to_cpu(*p)) ;
413 write_mdr(smc,td) ; /* write over memory data reg to buffer */
438 static void directed_beacon(struct s_smc *smc)
449 memcpy((char *)a+1, (char *) &smc->mib.m[MAC0].fddiMACUpstreamNbr, ETH_ALEN);
453 MARW(smc->hw.fp.fifo.rbc_ram_start+DBEACON_FRAME_OFF+4) ;
454 write_mdr(smc,le32_to_cpu(a[0])) ;
456 write_mdr(smc,le32_to_cpu(a[1])) ;
458 outpw(FM_A(FM_SABC),smc->hw.fp.fifo.rbc_ram_start + DBEACON_FRAME_OFF) ;
467 static void build_claim_beacon(struct s_smc *smc, u_long t_request)
478 mac = &smc->hw.fp.mac_sfb ;
485 copy_tx_mac(smc,td,(struct fddi_mac *)mac,
486 smc->hw.fp.fifo.rbc_ram_start + CLAIM_FRAME_OFF,len) ;
488 outpw(FM_A(FM_SACL),smc->hw.fp.fifo.rbc_ram_start + CLAIM_FRAME_OFF) ;
500 copy_tx_mac(smc,td,(struct fddi_mac *)mac,
501 smc->hw.fp.fifo.rbc_ram_start + BEACON_FRAME_OFF,len) ;
503 outpw(FM_A(FM_SABC),smc->hw.fp.fifo.rbc_ram_start + BEACON_FRAME_OFF) ;
518 copy_tx_mac(smc,td,(struct fddi_mac *)mac,
519 smc->hw.fp.fifo.rbc_ram_start + DBEACON_FRAME_OFF,len) ;
522 outpw(FM_A(FM_EACB),smc->hw.fp.fifo.rx1_fifo_start-1) ;
528 static void formac_rcv_restart(struct s_smc *smc)
531 SETMASK(FM_A(FM_MDREG1),smc->hw.fp.rx_mode,FM_ADDRX) ;
536 void formac_tx_restart(struct s_smc *smc)
542 static void enable_formac(struct s_smc *smc)
559 void enable_tx_irq(smc, queue)
560 struct s_smc *smc ;
582 void enable_tx_irq(struct s_smc *smc, u_short queue)
600 void disable_tx_irq(smc, queue)
601 struct s_smc *smc ;
617 void disable_tx_irq(struct s_smc *smc, u_short queue)
633 static void disable_formac(struct s_smc *smc)
645 static void mac_ring_up(struct s_smc *smc, int up)
648 formac_rcv_restart(smc) ; /* enable receive function */
649 smc->hw.mac_ring_is_up = TRUE ;
650 llc_restart_tx(smc) ; /* TX queue */
659 smc->hw.mac_ring_is_up = FALSE ;
672 void mac2_irq(struct s_smc *smc, u_short code_s2u, u_short code_s2l)
681 queue_event(smc,EVENT_RMT,RM_TX_STATE_CHANGE) ;
684 queue_event(smc,EVENT_RMT,RM_TX_STATE_CHANGE) ;
690 change_s2l = smc->hw.fp.s2l ^ code_s2l ;
691 change_s2u = smc->hw.fp.s2u ^ code_s2u ;
694 (!smc->hw.mac_ring_is_up && ((code_s2l & FM_SRNGOP)))) {
696 mac_ring_up(smc,1) ;
697 queue_event(smc,EVENT_RMT,RM_RING_OP) ;
698 smc->mib.m[MAC0].fddiMACRingOp_Ct++ ;
701 mac_ring_up(smc,0) ;
702 queue_event(smc,EVENT_RMT,RM_RING_NON_OP) ;
707 smc->mib.m[MAC0].fddiMACNotCopied_Ct++ ;
711 smc->hw.mac_ct.mac_r_restart_counter++ ;
712 /* formac_rcv_restart(smc) ; */
713 smt_stat_counter(smc,1) ;
717 queue_event(smc,EVENT_RMT,RM_OTHER_BEACON) ;
719 queue_event(smc,EVENT_RMT,RM_MY_BEACON) ;
728 queue_event(smc,EVENT_RMT,RM_MY_CLAIM) ;
738 queue_event(smc,EVENT_RMT,RM_VALID_CLAIM) ;
745 queue_event(smc,EVENT_RMT,RM_TRT_EXP) ;
752 smc->r.dup_addr_test = DA_FAILED ;
753 queue_event(smc,EVENT_RMT,RM_DUP_ADDR) ;
756 smc->hw.fp.err_stats.err_bec_stat++ ;
758 smc->hw.fp.err_stats.err_clm_stat++ ;
760 smc->mib.m[MAC0].fddiMACTvxExpired_Ct++ ;
762 if (!(change_s2l & FM_SRNGOP) && (smc->hw.fp.s2l & FM_SRNGOP)) {
763 mac_ring_up(smc,0) ;
764 queue_event(smc,EVENT_RMT,RM_RING_NON_OP) ;
766 mac_ring_up(smc,1) ;
767 queue_event(smc,EVENT_RMT,RM_RING_OP) ;
768 smc->mib.m[MAC0].fddiMACRingOp_Ct++ ;
772 smc->hw.fp.err_stats.err_phinv++ ;
774 smc->hw.fp.err_stats.err_sifg_det++ ;
776 smc->hw.fp.err_stats.err_tkiss++ ;
778 smc->hw.fp.err_stats.err_tkerr++ ;
780 smc->mib.m[MAC0].fddiMACFrame_Ct += 0x10000L ;
782 smc->mib.m[MAC0].fddiMACError_Ct += 0x10000L ;
784 smc->mib.m[MAC0].fddiMACLost_Ct += 0x10000L ;
786 SMT_PANIC(smc,SMT_E0114, SMT_E0114_MSG) ;
790 smc->hw.fp.s2l = code_s2l ;
791 smc->hw.fp.s2u = code_s2u ;
798 void mac3_irq(struct s_smc *smc, u_short code_s3u, u_short code_s3l)
804 smc->hw.mac_ct.mac_r_restart_counter++ ;
805 smt_stat_counter(smc,1);
810 SMT_PANIC(smc,SMT_E0115, SMT_E0115_MSG) ;
813 SMT_PANIC(smc,SMT_E0116, SMT_E0116_MSG) ;
821 static void formac_offline(struct s_smc *smc)
831 disable_formac(smc) ;
832 smc->hw.mac_ring_is_up = FALSE ;
833 smc->hw.hw_state = STOPPED ;
839 static void formac_online(struct s_smc *smc)
841 enable_formac(smc) ;
843 smc->hw.fp.rx_mode, FM_MMODE | FM_SELRA | FM_ADDRX) ;
849 int init_fplus(struct s_smc *smc)
851 smc->hw.fp.nsa_mode = FM_MRNNSAFNMA ;
852 smc->hw.fp.rx_mode = FM_MDAMA ;
853 smc->hw.fp.group_addr = fddi_broadcast ;
854 smc->hw.fp.func_addr = 0 ;
855 smc->hw.fp.frselreg_init = 0 ;
857 init_driver_fplus(smc) ;
858 if (smc->s.sas == SMT_DAS)
859 smc->hw.fp.mdr3init |= FM_MENDAS ;
861 smc->hw.mac_ct.mac_nobuf_counter = 0 ;
862 smc->hw.mac_ct.mac_r_restart_counter = 0 ;
864 smc->hw.fp.fm_st1u = (HW_PTR) ADDR(B0_ST1U) ;
865 smc->hw.fp.fm_st1l = (HW_PTR) ADDR(B0_ST1L) ;
866 smc->hw.fp.fm_st2u = (HW_PTR) ADDR(B0_ST2U) ;
867 smc->hw.fp.fm_st2l = (HW_PTR) ADDR(B0_ST2L) ;
868 smc->hw.fp.fm_st3u = (HW_PTR) ADDR(B0_ST3U) ;
869 smc->hw.fp.fm_st3l = (HW_PTR) ADDR(B0_ST3L) ;
871 smc->hw.fp.s2l = smc->hw.fp.s2u = 0 ;
872 smc->hw.mac_ring_is_up = 0 ;
874 mac_counter_init(smc) ;
877 smc->hw.mac_pa.t_neg = (u_long)0 ;
878 smc->hw.mac_pa.t_pri = (u_long)0 ;
881 mac_do_pci_fix(smc) ;
883 return init_mac(smc, 1);
884 /* enable_formac(smc) ; */
887 static int init_mac(struct s_smc *smc, int all)
896 set_formac_addr(smc) ;
899 outpw(FM_A(FM_MDREG2),smc->hw.fp.mdr2init) ;
902 init_ram(smc) ;
909 time = hwt_quick_read(smc) ;
915 smt_split_up_fifo(smc) ;
917 init_tx(smc) ;
918 init_rx(smc) ;
919 init_rbc(smc) ;
921 build_claim_beacon(smc,smc->mib.m[MAC0].fddiMACT_Req) ;
928 outpw(FM_A(FM_MDREG1),MDR1INIT | FM_SELRA | smc->hw.fp.rx_mode) ;
929 outpw(FM_A(FM_MDREG2),smc->hw.fp.mdr2init) ;
930 outpw(FM_A(FM_MDREG3),smc->hw.fp.mdr3init) ;
931 outpw(FM_A(FM_FRSELREG),smc->hw.fp.frselreg_init) ;
939 t_max = (u_short)(smc->mib.m[MAC0].fddiMACT_Max/32) ;
947 if (smc->mib.m[MAC0].fddiMACTvxValue < (u_long) (- US2BCLK(52))) {
951 (u_short)((smc->mib.m[MAC0].fddiMACTvxValue/255) & MB)) ;
961 rtm_init(smc) ; /* RT-Monitor */
967 hwt_wait_time(smc,time,MS2BCLK(10)) ;
975 if (!smc->hw.hw_is_64bit) {
980 smc->hw.hw_state = STOPPED ;
981 mac_drv_repair_descr(smc) ;
983 smc->hw.hw_state = STARTED ;
992 void config_mux(struct s_smc *smc, int mux)
994 plc_config_mux(smc,mux) ;
1006 void sm_mac_check_beacon_claim(struct s_smc *smc)
1011 formac_rcv_restart(smc) ;
1012 process_receive(smc) ;
1019 void sm_ma_control(struct s_smc *smc, int mode)
1024 formac_offline(smc) ;
1027 (void)init_mac(smc,0) ;
1030 formac_online(smc) ;
1033 directed_beacon(smc) ;
1043 int sm_mac_get_tx_state(struct s_smc *smc)
1052 static struct s_fpmc* mac_get_mc_table(struct s_smc *smc,
1072 for (i = 0, tb = smc->hw.fp.mc.table ; i < FPMAX_MULTICAST ; i++, tb++){
1088 void mac_clear_multicast(smc)
1089 struct s_smc *smc ;
1096 void mac_clear_multicast(struct s_smc *smc)
1101 smc->hw.fp.os_slots_used = 0 ; /* note the SMT addresses */
1103 for (i = 0, tb = smc->hw.fp.mc.table ; i < FPMAX_MULTICAST ; i++, tb++){
1113 int mac_add_multicast(smc,addr,can)
1114 struct s_smc *smc ;
1138 int mac_add_multicast(struct s_smc *smc, struct fddi_addr *addr, int can)
1147 if (smc->hw.fp.smt_slots_used >= SMT_MAX_MULTI) {
1152 if (smc->hw.fp.os_slots_used >= FPMAX_MULTICAST-SMT_MAX_MULTI) {
1160 if (!(tb = mac_get_mc_table(smc,addr,&own,0,can & ~0x80)))
1167 smc->hw.fp.smt_slots_used++ ;
1169 smc->hw.fp.os_slots_used++ ;
1184 void mac_update_multicast(smc)
1185 struct s_smc *smc ;
1192 void mac_update_multicast(struct s_smc *smc)
1206 if (smc->hw.fp.func_addr) {
1207 fu = (u_char *) &smc->hw.fp.func_addr ;
1226 for (i = 0, tb = smc->hw.fp.mc.table; i < FPMAX_MULTICAST; i++, tb++) {
1247 void mac_set_rx_mode(smc,mode)
1248 struct s_smc *smc ;
1268 void mac_set_rx_mode(struct s_smc *smc, int mode)
1272 smc->hw.fp.rx_prom |= RX_MODE_ALL_MULTI ;
1275 smc->hw.fp.rx_prom &= ~RX_MODE_ALL_MULTI ;
1278 smc->hw.fp.rx_prom |= RX_MODE_PROM ;
1281 smc->hw.fp.rx_prom &= ~RX_MODE_PROM ;
1284 smc->hw.fp.nsa_mode = FM_MDAMA ;
1285 smc->hw.fp.rx_mode = (smc->hw.fp.rx_mode & ~FM_ADDET) |
1286 smc->hw.fp.nsa_mode ;
1289 smc->hw.fp.nsa_mode = FM_MRNNSAFNMA ;
1290 smc->hw.fp.rx_mode = (smc->hw.fp.rx_mode & ~FM_ADDET) |
1291 smc->hw.fp.nsa_mode ;
1294 if (smc->hw.fp.rx_prom & RX_MODE_PROM) {
1295 smc->hw.fp.rx_mode = FM_MLIMPROM ;
1297 else if (smc->hw.fp.rx_prom & RX_MODE_ALL_MULTI) {
1298 smc->hw.fp.rx_mode = smc->hw.fp.nsa_mode | FM_EXGPA0 ;
1301 smc->hw.fp.rx_mode = smc->hw.fp.nsa_mode ;
1302 SETMASK(FM_A(FM_MDREG1),smc->hw.fp.rx_mode,FM_ADDRX) ;
1303 mac_update_multicast(smc) ;
1324 void rtm_irq(struct s_smc *smc)
1330 AIX_EVENT(smc, (u_long) FDDI_RING_STATUS,
1332 (u_long) FDDI_RTT, smt_get_event_word(smc));
1337 static void rtm_init(struct s_smc *smc)
1343 void rtm_set_timer(struct s_smc *smc)
1349 (int)smc->mib.a[PATH0].fddiPATHT_Rmode);
1350 outpd(ADDR(B2_RTM_INI),smc->mib.a[PATH0].fddiPATHT_Rmode) ;
1353 static void smt_split_up_fifo(struct s_smc *smc)
1382 SMT_PANIC(smc,SMT_E0117, SMT_E0117_MSG) ;
1387 smc->hw.fp.fifo.rx1_fifo_size = RX_FIFO_SPACE ;
1388 smc->hw.fp.fifo.rx2_fifo_size = 0 ;
1393 smc->hw.fp.fifo.rx1_fifo_size = RX_LARGE_FIFO ;
1394 smc->hw.fp.fifo.rx2_fifo_size = RX_SMALL_FIFO ;
1397 smc->hw.fp.fifo.rx1_fifo_size = RX_FIFO_SPACE *
1399 smc->hw.fp.fifo.rx2_fifo_size = RX_FIFO_SPACE *
1426 if (smc->mib.a[PATH0].fddiPATHSbaPayload) {
1428 smc->hw.fp.fifo.fifo_config_mode |=
1429 smc->mib.fddiESSSynchTxMode | SYNC_TRAFFIC_ON ;
1433 smc->hw.fp.fifo.fifo_config_mode &=
1440 if (smc->hw.fp.fifo.fifo_config_mode & SYNC_TRAFFIC_ON) {
1441 if (smc->hw.fp.fifo.fifo_config_mode & SEND_ASYNC_AS_SYNC) {
1442 smc->hw.fp.fifo.tx_s_size = TX_LARGE_FIFO ;
1443 smc->hw.fp.fifo.tx_a0_size = TX_SMALL_FIFO ;
1446 smc->hw.fp.fifo.tx_s_size = TX_MEDIUM_FIFO ;
1447 smc->hw.fp.fifo.tx_a0_size = TX_MEDIUM_FIFO ;
1451 smc->hw.fp.fifo.tx_s_size = 0 ;
1452 smc->hw.fp.fifo.tx_a0_size = TX_FIFO_SPACE ;
1455 smc->hw.fp.fifo.rx1_fifo_start = smc->hw.fp.fifo.rbc_ram_start +
1457 smc->hw.fp.fifo.tx_s_start = smc->hw.fp.fifo.rx1_fifo_start +
1458 smc->hw.fp.fifo.rx1_fifo_size ;
1459 smc->hw.fp.fifo.tx_a0_start = smc->hw.fp.fifo.tx_s_start +
1460 smc->hw.fp.fifo.tx_s_size ;
1461 smc->hw.fp.fifo.rx2_fifo_start = smc->hw.fp.fifo.tx_a0_start +
1462 smc->hw.fp.fifo.tx_a0_size ;
1464 DB_SMT("FIFO split: mode = %x", smc->hw.fp.fifo.fifo_config_mode);
1466 smc->hw.fp.fifo.rbc_ram_start, smc->hw.fp.fifo.rbc_ram_end);
1468 smc->hw.fp.fifo.rx1_fifo_start, smc->hw.fp.fifo.tx_s_start);
1470 smc->hw.fp.fifo.tx_a0_start, smc->hw.fp.fifo.rx2_fifo_start);
1473 void formac_reinit_tx(struct s_smc *smc)
1480 if (!smc->hw.fp.fifo.tx_s_size && smc->mib.a[PATH0].fddiPATHSbaPayload){
1481 (void)init_mac(smc,0) ;