Lines Matching defs:val
1862 u32 val;
1864 val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
1869 val &= ~GBE_STATS_CD_SEL;
1873 val |= GBE_STATS_CD_SEL;
1880 writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
2129 u32 val = 0;
2131 val = readl(GBE_REG_ADDR(gbe_dev, ss_regs, rgmii_status));
2132 *status = !!(val & RGMII_REG_STATUS_LINK);
2899 u32 reg, val;
2929 val = GBE_CTL_P0_ENABLE;
2931 val |= ETH_SW_CTL_P0_TX_CRC_REMOVE;
2934 writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, control));