Lines Matching defs:cpsw
24 #include "cpsw.h"
33 int (*cpsw_slave_index)(struct cpsw_common *cpsw, struct cpsw_priv *priv);
35 void cpsw_intr_enable(struct cpsw_common *cpsw)
37 writel_relaxed(0xFF, &cpsw->wr_regs->tx_en);
38 writel_relaxed(0xFF, &cpsw->wr_regs->rx_en);
40 cpdma_ctlr_int_ctrl(cpsw->dma, true);
43 void cpsw_intr_disable(struct cpsw_common *cpsw)
45 writel_relaxed(0, &cpsw->wr_regs->tx_en);
46 writel_relaxed(0, &cpsw->wr_regs->rx_en);
48 cpdma_ctlr_int_ctrl(cpsw->dma, false);
87 struct cpsw_common *cpsw = dev_id;
89 writel(0, &cpsw->wr_regs->tx_en);
90 cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX);
92 if (cpsw->quirk_irq) {
93 disable_irq_nosync(cpsw->irqs_table[1]);
94 cpsw->tx_irq_disabled = true;
97 napi_schedule(&cpsw->napi_tx);
103 struct cpsw_common *cpsw = dev_id;
105 writel(0, &cpsw->wr_regs->rx_en);
106 cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX);
108 if (cpsw->quirk_irq) {
109 disable_irq_nosync(cpsw->irqs_table[0]);
110 cpsw->rx_irq_disabled = true;
113 napi_schedule(&cpsw->napi_rx);
119 struct cpsw_common *cpsw = dev_id;
121 writel(0, &cpsw->wr_regs->misc_en);
122 cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_MISC);
123 cpts_misc_interrupt(cpsw->cpts);
124 writel(0x10, &cpsw->wr_regs->misc_en);
131 struct cpsw_common *cpsw = napi_to_cpsw(napi_tx);
137 ch_map = cpdma_ctrl_txchs_state(cpsw->dma);
142 txv = &cpsw->txv[ch];
155 writel(0xff, &cpsw->wr_regs->tx_en);
163 struct cpsw_common *cpsw = napi_to_cpsw(napi_tx);
166 num_tx = cpdma_chan_process(cpsw->txv[0].ch, budget);
169 writel(0xff, &cpsw->wr_regs->tx_en);
170 if (cpsw->tx_irq_disabled) {
171 cpsw->tx_irq_disabled = false;
172 enable_irq(cpsw->irqs_table[1]);
181 struct cpsw_common *cpsw = napi_to_cpsw(napi_rx);
187 ch_map = cpdma_ctrl_rxchs_state(cpsw->dma);
192 rxv = &cpsw->rxv[ch];
205 writel(0xff, &cpsw->wr_regs->rx_en);
213 struct cpsw_common *cpsw = napi_to_cpsw(napi_rx);
216 num_rx = cpdma_chan_process(cpsw->rxv[0].ch, budget);
219 writel(0xff, &cpsw->wr_regs->rx_en);
220 if (cpsw->rx_irq_disabled) {
221 cpsw->rx_irq_disabled = false;
222 enable_irq(cpsw->irqs_table[0]);
233 struct cpsw_common *cpsw = priv->cpsw;
255 if (!cpsw_ale_get_vlan_p0_untag(cpsw->ale, vid)) {
292 struct cpsw_common *cpsw = priv->cpsw;
297 cpsw_intr_disable(cpsw);
298 for (ch = 0; ch < cpsw->tx_ch_num; ch++) {
299 cpdma_chan_stop(cpsw->txv[ch].ch);
300 cpdma_chan_start(cpsw->txv[ch].ch);
303 cpsw_intr_enable(cpsw);
308 static int cpsw_get_common_speed(struct cpsw_common *cpsw)
312 for (i = 0, speed = 0; i < cpsw->data.slaves; i++)
313 if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link)
314 speed += cpsw->slaves[i].phy->speed;
319 int cpsw_need_resplit(struct cpsw_common *cpsw)
325 speed = cpsw_get_common_speed(cpsw);
326 if (speed == cpsw->speed || !speed)
329 cpsw->speed = speed;
331 for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) {
332 ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch);
340 if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num)
346 void cpsw_split_res(struct cpsw_common *cpsw)
349 struct cpsw_vector *txv = cpsw->txv;
355 for (i = 0; i < cpsw->tx_ch_num; i++) {
364 if (cpsw->tx_ch_num == rlim_ch_num) {
367 ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num;
371 max_rate = cpsw->speed * 1000;
384 (cpsw->tx_ch_num - rlim_ch_num);
386 (cpsw->tx_ch_num - rlim_ch_num);
391 for (i = 0; i < cpsw->tx_ch_num; i++) {
405 cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight);
410 cpdma_chan_set_weight(cpsw->txv[i].ch, 0);
421 ch_budget = budget / cpsw->rx_ch_num;
422 for (i = 0; i < cpsw->rx_ch_num; i++) {
423 cpsw->rxv[i].budget = ch_budget;
428 cpsw->rxv[0].budget += budget;
431 int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs,
439 struct device *dev = cpsw->dev;
444 data = &cpsw->data;
445 cpsw->rx_ch_num = 1;
446 cpsw->tx_ch_num = 1;
448 cpsw->version = readl(&cpsw->regs->id_ver);
453 switch (cpsw->version) {
455 cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET;
457 cpsw->hw_stats = ss_regs + CPSW1_HW_STATS;
469 cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET;
471 cpsw->hw_stats = ss_regs + CPSW2_HW_STATS;
481 dev_err(dev, "unknown version 0x%08x\n", cpsw->version);
485 for (i = 0; i < cpsw->data.slaves; i++) {
486 struct cpsw_slave *slave = &cpsw->slaves[i];
487 void __iomem *regs = cpsw->regs;
490 slave->data = &cpsw->data.slave_data[i];
493 slave->mac_sl = cpsw_sl_get("cpsw", dev, regs + sliver_offset);
504 ale_params.dev_id = "cpsw";
506 cpsw->ale = cpsw_ale_create(&ale_params);
507 if (IS_ERR(cpsw->ale)) {
509 return PTR_ERR(cpsw->ale);
526 dma_params.bus_freq_mhz = cpsw->bus_freq_mhz;
529 cpsw->dma = cpdma_ctlr_create(&dma_params);
530 if (!cpsw->dma) {
535 cpts_node = of_get_child_by_name(cpsw->dev->of_node, "cpts");
537 cpts_node = cpsw->dev->of_node;
539 cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpts_node,
541 if (IS_ERR(cpsw->cpts)) {
542 ret = PTR_ERR(cpsw->cpts);
543 cpdma_ctlr_destroy(cpsw->dma);
554 struct cpsw_common *cpsw = priv->cpsw;
555 struct cpsw_slave *slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
578 struct cpsw_common *cpsw = priv->cpsw;
582 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
585 switch (cpsw->version) {
611 writel_relaxed(ETH_P_1588, &cpsw->regs->ts_ltype);
612 writel_relaxed(ETH_P_8021Q, &cpsw->regs->vlan_ltype);
618 struct cpsw_common *cpsw = priv->cpsw;
621 if (cpsw->version != CPSW_VERSION_1 &&
622 cpsw->version != CPSW_VERSION_2 &&
623 cpsw->version != CPSW_VERSION_3)
664 switch (cpsw->version) {
681 struct cpsw_common *cpsw = ndev_to_cpsw(dev);
685 if (cpsw->version != CPSW_VERSION_1 &&
686 cpsw->version != CPSW_VERSION_2 &&
687 cpsw->version != CPSW_VERSION_3)
711 struct cpsw_common *cpsw = priv->cpsw;
712 int slave_no = cpsw_slave_index(cpsw, priv);
724 if (!cpsw->slaves[slave_no].phy)
726 return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd);
732 struct cpsw_common *cpsw = priv->cpsw;
743 min_rate = cpdma_chan_get_min_rate(cpsw->dma);
750 if (rate > cpsw->speed) {
755 ret = pm_runtime_get_sync(cpsw->dev);
757 pm_runtime_put_noidle(cpsw->dev);
761 ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate);
762 pm_runtime_put(cpsw->dev);
768 for (i = 0; i < cpsw->data.slaves; i++) {
769 slave = &cpsw->slaves[i];
776 cpsw_split_res(cpsw);
790 struct cpsw_common *cpsw = priv->cpsw;
794 val = readl_relaxed(&cpsw->regs->ptype);
796 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
806 struct cpsw_common *cpsw = priv->cpsw;
810 val = readl_relaxed(&cpsw->regs->ptype);
812 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
817 writel_relaxed(val, &cpsw->regs->ptype);
822 struct cpsw_common *cpsw = priv->cpsw;
833 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
882 struct cpsw_common *cpsw = priv->cpsw;
891 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
892 tx_in_ctl_rg = cpsw->version == CPSW_VERSION_1 ?
934 struct cpsw_common *cpsw = priv->cpsw;
957 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
971 ret = pm_runtime_get_sync(cpsw->dev);
973 pm_runtime_put_noidle(cpsw->dev);
988 pm_runtime_put_sync(cpsw->dev);
996 struct cpsw_common *cpsw = priv->cpsw;
1009 ret = pm_runtime_get_sync(cpsw->dev);
1011 pm_runtime_put_noidle(cpsw->dev);
1038 offset = cpsw->version == CPSW_VERSION_1 ?
1041 slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
1044 pm_runtime_put_sync(cpsw->dev);
1079 struct cpsw_common *cpsw = priv->cpsw;
1093 tx_prio_rg = cpsw->version == CPSW_VERSION_1 ?
1101 struct cpsw_common *cpsw = priv->cpsw;
1109 for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
1110 pool = cpsw->page_pool[ch];
1111 ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch);
1124 ret = cpdma_chan_idle_submit_mapped(cpsw->rxv[ch].ch,
1126 cpsw->rx_packet_max,
1144 static struct page_pool *cpsw_create_page_pool(struct cpsw_common *cpsw,
1155 pp_params.dev = cpsw->dev;
1159 dev_err(cpsw->dev, "cannot create rx page pool\n");
1164 static int cpsw_create_rx_pool(struct cpsw_common *cpsw, int ch)
1169 pool_size = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch);
1170 pool = cpsw_create_page_pool(cpsw, pool_size);
1174 cpsw->page_pool[ch] = pool;
1181 struct cpsw_common *cpsw = priv->cpsw;
1186 pool = cpsw->page_pool[ch];
1210 void cpsw_destroy_xdp_rxqs(struct cpsw_common *cpsw)
1215 for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
1216 for (i = 0; i < cpsw->data.slaves; i++) {
1217 ndev = cpsw->slaves[i].ndev;
1224 page_pool_destroy(cpsw->page_pool[ch]);
1225 cpsw->page_pool[ch] = NULL;
1229 int cpsw_create_xdp_rxqs(struct cpsw_common *cpsw)
1234 for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
1235 ret = cpsw_create_rx_pool(cpsw, ch);
1242 for (i = 0; i < cpsw->data.slaves; i++) {
1243 ndev = cpsw->slaves[i].ndev;
1256 cpsw_destroy_xdp_rxqs(cpsw);
1291 struct cpsw_common *cpsw = priv->cpsw;
1300 txch = cpsw->txv[0].ch;
1328 struct cpsw_common *cpsw = priv->cpsw;
1380 page_pool_recycle_direct(cpsw->page_pool[ch], page);