Lines Matching defs:bits
23 #define BITMASK(bits) (BIT(bits) - 1)
105 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
111 idx2 = (start + bits - 1) / 32;
112 /* Check if bits to be fetched exceed a word */
119 return (hi_val + (ale_entry[idx] >> start)) & BITMASK(bits);
122 static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,
127 value &= BITMASK(bits);
129 idx2 = (start + bits - 1) / 32;
130 /* Check if bits to be set exceed a word */
133 ale_entry[idx2] &= ~(BITMASK(bits + start - (idx2 * 32)));
138 ale_entry[idx] &= ~(BITMASK(bits) << start);
142 #define DEFINE_ALE_FIELD(name, start, bits) \
145 return cpsw_ale_get_field(ale_entry, start, bits); \
149 cpsw_ale_set_field(ale_entry, start, bits, value); \
153 static inline int cpsw_ale_get_##name(u32 *ale_entry, u32 bits) \
155 return cpsw_ale_get_field(ale_entry, start, bits); \
158 u32 bits) \
160 cpsw_ale_set_field(ale_entry, start, bits, value); \
177 #define ALE_ENTRY_FLD(id, start, bits) \
180 .num_bits = bits, \
235 u32 bits;
246 bits = entry_fld->num_bits;
248 bits = ale->port_mask_bits;
250 return cpsw_ale_get_field(ale_entry, entry_fld->start_bit, bits);
260 u32 bits;
271 bits = entry_fld->num_bits;
273 bits = ale->port_mask_bits;
275 cpsw_ale_set_field(ale_entry, entry_fld->start_bit, bits, value);
848 int bits;
858 .bits = 1,
866 .bits = 1,
874 .bits = 1,
882 .bits = 1,
890 .bits = 1,
898 .bits = 1,
906 .bits = 1,
914 .bits = 1,
922 .bits = 1,
930 .bits = 1,
938 .bits = 1,
946 .bits = 1,
954 .bits = 2,
962 .bits = 1,
970 .bits = 1,
978 .bits = 1,
986 .bits = 1,
994 .bits = 1,
1002 .bits = 1,
1010 .bits = 8,
1018 .bits = 8,
1026 .bits = 6,
1034 .bits = 6,
1042 .bits = 6,
1050 .bits = 6,
1058 .bits = 6,
1066 .bits = 1,
1087 mask = BITMASK(info->bits);
1121 return tmp & BITMASK(info->bits);
1321 /* set default bits for existing h/w */
1331 * Also there are N bits, where N is number of ale
1334 ale_controls[ALE_PORT_UNKNOWN_VLAN_MEMBER].bits =
1338 ale_controls[ALE_PORT_UNKNOWN_MCAST_FLOOD].bits =
1343 ale_controls[ALE_PORT_UNKNOWN_REG_MCAST_FLOOD].bits =
1348 ale_controls[ALE_PORT_UNTAGGED_EGRESS].bits =