Lines Matching defs:dwmac
3 * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
102 int (*clk_prepare)(struct stm32_dwmac *dwmac, bool prepare);
103 int (*suspend)(struct stm32_dwmac *dwmac);
104 void (*resume)(struct stm32_dwmac *dwmac);
105 int (*parse_data)(struct stm32_dwmac *dwmac,
113 struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
116 if (dwmac->ops->set_mode) {
117 ret = dwmac->ops->set_mode(plat_dat);
122 ret = clk_prepare_enable(dwmac->clk_tx);
126 if (!dwmac->ops->clk_rx_enable_in_suspend ||
127 !dwmac->dev->power.is_suspended) {
128 ret = clk_prepare_enable(dwmac->clk_rx);
130 clk_disable_unprepare(dwmac->clk_tx);
135 if (dwmac->ops->clk_prepare) {
136 ret = dwmac->ops->clk_prepare(dwmac, true);
138 clk_disable_unprepare(dwmac->clk_rx);
139 clk_disable_unprepare(dwmac->clk_tx);
146 static int stm32mp1_clk_prepare(struct stm32_dwmac *dwmac, bool prepare)
151 ret = clk_prepare_enable(dwmac->syscfg_clk);
154 if (dwmac->enable_eth_ck) {
155 ret = clk_prepare_enable(dwmac->clk_eth_ck);
157 clk_disable_unprepare(dwmac->syscfg_clk);
162 clk_disable_unprepare(dwmac->syscfg_clk);
163 if (dwmac->enable_eth_ck)
164 clk_disable_unprepare(dwmac->clk_eth_ck);
171 struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
172 u32 reg = dwmac->mode_reg, clk_rate;
175 clk_rate = clk_get_rate(dwmac->clk_eth_ck);
176 dwmac->enable_eth_ck = false;
179 if (clk_rate == ETH_CK_F_25M && dwmac->ext_phyclk)
180 dwmac->enable_eth_ck = true;
187 (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk)) {
188 dwmac->enable_eth_ck = true;
196 (dwmac->eth_ref_clk_sel_reg || dwmac->ext_phyclk)) {
197 dwmac->enable_eth_ck = true;
208 (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk)) {
209 dwmac->enable_eth_ck = true;
222 regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
223 dwmac->ops->syscfg_eth_mask);
226 return regmap_update_bits(dwmac->regmap, reg,
227 dwmac->ops->syscfg_eth_mask, val);
232 struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
233 u32 reg = dwmac->mode_reg;
252 return regmap_update_bits(dwmac->regmap, reg,
253 dwmac->ops->syscfg_eth_mask, val << 23);
256 static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)
258 clk_disable_unprepare(dwmac->clk_tx);
259 clk_disable_unprepare(dwmac->clk_rx);
261 if (dwmac->ops->clk_prepare)
262 dwmac->ops->clk_prepare(dwmac, false);
265 static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
272 dwmac->clk_tx = devm_clk_get(dev, "mac-clk-tx");
273 if (IS_ERR(dwmac->clk_tx)) {
275 return PTR_ERR(dwmac->clk_tx);
278 dwmac->clk_rx = devm_clk_get(dev, "mac-clk-rx");
279 if (IS_ERR(dwmac->clk_rx)) {
281 return PTR_ERR(dwmac->clk_rx);
284 if (dwmac->ops->parse_data) {
285 err = dwmac->ops->parse_data(dwmac, dev);
291 dwmac->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");
292 if (IS_ERR(dwmac->regmap))
293 return PTR_ERR(dwmac->regmap);
295 err = of_property_read_u32_index(np, "st,syscon", 1, &dwmac->mode_reg);
302 static int stm32mp1_parse_data(struct stm32_dwmac *dwmac,
310 dwmac->ext_phyclk = of_property_read_bool(np, "st,ext-phyclk");
313 dwmac->eth_clk_sel_reg = of_property_read_bool(np, "st,eth-clk-sel");
316 dwmac->eth_ref_clk_sel_reg =
320 dwmac->clk_eth_ck = devm_clk_get(dev, "eth-ck");
321 if (IS_ERR(dwmac->clk_eth_ck)) {
323 dwmac->clk_eth_ck = NULL;
327 dwmac->clk_ethstp = devm_clk_get(dev, "ethstp");
328 if (IS_ERR(dwmac->clk_ethstp)) {
331 return PTR_ERR(dwmac->clk_ethstp);
335 dwmac->syscfg_clk = devm_clk_get(dev, "syscfg-clk");
336 if (IS_ERR(dwmac->syscfg_clk))
337 dwmac->syscfg_clk = NULL;
342 dwmac->irq_pwr_wakeup = platform_get_irq_byname_optional(pdev,
344 if (dwmac->irq_pwr_wakeup == -EPROBE_DEFER)
347 if (!dwmac->clk_eth_ck && dwmac->irq_pwr_wakeup >= 0) {
354 dwmac->irq_pwr_wakeup);
368 struct stm32_dwmac *dwmac;
380 dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
381 if (!dwmac) {
393 dwmac->ops = data;
394 dwmac->dev = &pdev->dev;
396 ret = stm32_dwmac_parse_data(dwmac, &pdev->dev);
402 plat_dat->bsp_priv = dwmac;
415 stm32_dwmac_clk_disable(dwmac);
427 struct stm32_dwmac *dwmac = priv->plat->bsp_priv;
431 if (dwmac->irq_pwr_wakeup >= 0) {
439 static int stm32mp1_suspend(struct stm32_dwmac *dwmac)
443 ret = clk_prepare_enable(dwmac->clk_ethstp);
447 clk_disable_unprepare(dwmac->clk_tx);
448 clk_disable_unprepare(dwmac->syscfg_clk);
449 if (dwmac->enable_eth_ck)
450 clk_disable_unprepare(dwmac->clk_eth_ck);
455 static void stm32mp1_resume(struct stm32_dwmac *dwmac)
457 clk_disable_unprepare(dwmac->clk_ethstp);
460 static int stm32mcu_suspend(struct stm32_dwmac *dwmac)
462 clk_disable_unprepare(dwmac->clk_tx);
463 clk_disable_unprepare(dwmac->clk_rx);
473 struct stm32_dwmac *dwmac = priv->plat->bsp_priv;
479 if (dwmac->ops->suspend)
480 ret = dwmac->ops->suspend(dwmac);
489 struct stm32_dwmac *dwmac = priv->plat->bsp_priv;
492 if (dwmac->ops->resume)
493 dwmac->ops->resume(dwmac);
525 { .compatible = "st,stm32-dwmac", .data = &stm32mcu_dwmac_data},
526 { .compatible = "st,stm32mp1-dwmac", .data = &stm32mp1_dwmac_data},
535 .name = "stm32-dwmac",