Lines Matching defs:dwmac
4 * Adopted from dwmac-sti.c
60 struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;
61 void __iomem *splitter_base = dwmac->splitter_base;
62 void __iomem *sgmii_adapter_base = dwmac->pcs.sgmii_adapter_base;
63 struct device *dev = dwmac->dev;
95 tse_pcs_fix_mac_speed(&dwmac->pcs, phy_dev, speed);
99 static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *dev)
130 dwmac->f2h_ptp_ref_clk = of_property_read_bool(np, "altr,f2h_ptp_ref_clk");
141 dwmac->splitter_base = devm_ioremap_resource(dev, &res_splitter);
142 if (IS_ERR(dwmac->splitter_base)) {
144 return PTR_ERR(dwmac->splitter_base);
164 dwmac->splitter_base =
167 if (IS_ERR(dwmac->splitter_base)) {
168 ret = PTR_ERR(dwmac->splitter_base);
186 dwmac->pcs.sgmii_adapter_base =
189 if (IS_ERR(dwmac->pcs.sgmii_adapter_base)) {
190 ret = PTR_ERR(dwmac->pcs.sgmii_adapter_base);
208 dwmac->pcs.tse_pcs_base =
211 if (IS_ERR(dwmac->pcs.tse_pcs_base)) {
212 ret = PTR_ERR(dwmac->pcs.tse_pcs_base);
217 dwmac->reg_offset = reg_offset;
218 dwmac->reg_shift = reg_shift;
219 dwmac->sys_mgr_base_addr = sys_mgr_base_addr;
220 dwmac->dev = dev;
230 static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
232 struct net_device *ndev = dev_get_drvdata(dwmac->dev);
261 static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)
263 struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
264 int phymode = socfpga_get_plat_phymode(dwmac);
265 u32 reg_offset = dwmac->reg_offset;
266 u32 reg_shift = dwmac->reg_shift;
270 dev_err(dwmac->dev, "bad phy mode %d\n", phymode);
278 if (dwmac->splitter_base)
282 reset_control_assert(dwmac->stmmac_ocp_rst);
283 reset_control_assert(dwmac->stmmac_rst);
289 if (dwmac->f2h_ptp_ref_clk ||
300 if (dwmac->f2h_ptp_ref_clk)
311 reset_control_deassert(dwmac->stmmac_ocp_rst);
312 reset_control_deassert(dwmac->stmmac_rst);
314 if (tse_pcs_init(dwmac->pcs.tse_pcs_base, &dwmac->pcs) != 0) {
315 dev_err(dwmac->dev, "Unable to initialize TSE PCS");
323 static int socfpga_gen10_set_phy_mode(struct socfpga_dwmac *dwmac)
325 struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
326 int phymode = socfpga_get_plat_phymode(dwmac);
327 u32 reg_offset = dwmac->reg_offset;
328 u32 reg_shift = dwmac->reg_shift;
338 if (dwmac->splitter_base)
342 reset_control_assert(dwmac->stmmac_ocp_rst);
343 reset_control_assert(dwmac->stmmac_rst);
349 if (dwmac->f2h_ptp_ref_clk ||
368 reset_control_deassert(dwmac->stmmac_ocp_rst);
369 reset_control_deassert(dwmac->stmmac_rst);
371 if (tse_pcs_init(dwmac->pcs.tse_pcs_base, &dwmac->pcs) != 0) {
372 dev_err(dwmac->dev, "Unable to initialize TSE PCS");
385 struct socfpga_dwmac *dwmac;
404 dwmac = devm_kzalloc(dev, sizeof(*dwmac), GFP_KERNEL);
405 if (!dwmac) {
410 dwmac->stmmac_ocp_rst = devm_reset_control_get_optional(dev, "stmmaceth-ocp");
411 if (IS_ERR(dwmac->stmmac_ocp_rst)) {
412 ret = PTR_ERR(dwmac->stmmac_ocp_rst);
417 reset_control_deassert(dwmac->stmmac_ocp_rst);
419 ret = socfpga_dwmac_parse_data(dwmac, dev);
425 dwmac->ops = ops;
426 plat_dat->bsp_priv = dwmac;
440 dwmac->stmmac_rst = stpriv->plat->stmmac_rst;
442 ret = ops->set_phy_mode(dwmac);
529 .name = "socfpga-dwmac",