Lines Matching refs:value
60 * Since the register has a reset value of 1, if property
75 * Since the register has a reset value of 1, if property
188 u32 value;
213 value = readl(eqos->regs + SDMEMCOMPPADCTRL);
214 value |= SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD;
215 writel(value, eqos->regs + SDMEMCOMPPADCTRL);
219 value = readl(eqos->regs + AUTO_CAL_CONFIG);
220 value |= AUTO_CAL_CONFIG_START | AUTO_CAL_CONFIG_ENABLE;
221 writel(value, eqos->regs + AUTO_CAL_CONFIG);
224 value,
225 value & AUTO_CAL_STATUS_ACTIVE,
233 value,
234 (value & AUTO_CAL_STATUS_ACTIVE) == 0,
242 value = readl(eqos->regs + SDMEMCOMPPADCTRL);
243 value &= ~SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD;
244 writel(value, eqos->regs + SDMEMCOMPPADCTRL);
246 value = readl(eqos->regs + AUTO_CAL_CONFIG);
247 value &= ~AUTO_CAL_CONFIG_ENABLE;
248 writel(value, eqos->regs + AUTO_CAL_CONFIG);
260 u32 value;
264 value = (rate / 1000000) - 1;
265 writel(value, eqos->regs + GMAC_1US_TIC_COUNTER);