Lines Matching refs:lp
194 #define SMC_ENABLE_INT(lp, x) do { \
197 spin_lock_irqsave(&lp->lock, smc_enable_flags); \
198 mask = SMC_GET_INT_MASK(lp); \
200 SMC_SET_INT_MASK(lp, mask); \
201 spin_unlock_irqrestore(&lp->lock, smc_enable_flags); \
205 #define SMC_DISABLE_INT(lp, x) do { \
208 spin_lock_irqsave(&lp->lock, smc_disable_flags); \
209 mask = SMC_GET_INT_MASK(lp); \
211 SMC_SET_INT_MASK(lp, mask); \
212 spin_unlock_irqrestore(&lp->lock, smc_disable_flags); \
220 #define SMC_WAIT_MMU_BUSY(lp) do { \
221 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
223 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
240 struct smc_local *lp = netdev_priv(dev);
241 void __iomem *ioaddr = lp->base;
248 spin_lock_irq(&lp->lock);
249 SMC_SELECT_BANK(lp, 2);
250 SMC_SET_INT_MASK(lp, 0);
251 pending_skb = lp->pending_tx_skb;
252 lp->pending_tx_skb = NULL;
253 spin_unlock_irq(&lp->lock);
266 SMC_SELECT_BANK(lp, 0);
267 SMC_SET_RCR(lp, RCR_SOFTRST);
274 SMC_SELECT_BANK(lp, 1);
283 if (lp->cfg.flags & SMC91X_NOWAIT)
292 SMC_SET_CONFIG(lp, cfg);
305 SMC_SELECT_BANK(lp, 0);
306 SMC_SET_RCR(lp, RCR_CLEAR);
307 SMC_SET_TCR(lp, TCR_CLEAR);
309 SMC_SELECT_BANK(lp, 1);
310 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
321 SMC_SET_CTL(lp, ctl);
324 SMC_SELECT_BANK(lp, 2);
325 SMC_SET_MMU_CMD(lp, MC_RESET);
326 SMC_WAIT_MMU_BUSY(lp);
334 struct smc_local *lp = netdev_priv(dev);
335 void __iomem *ioaddr = lp->base;
341 SMC_SELECT_BANK(lp, 0);
342 SMC_SET_TCR(lp, lp->tcr_cur_mode);
343 SMC_SET_RCR(lp, lp->rcr_cur_mode);
345 SMC_SELECT_BANK(lp, 1);
346 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
350 if (lp->version >= (CHIP_91100 << 4))
352 SMC_SELECT_BANK(lp, 2);
353 SMC_SET_INT_MASK(lp, mask);
368 struct smc_local *lp = netdev_priv(dev);
369 void __iomem *ioaddr = lp->base;
375 spin_lock_irq(&lp->lock);
376 SMC_SELECT_BANK(lp, 2);
377 SMC_SET_INT_MASK(lp, 0);
378 pending_skb = lp->pending_tx_skb;
379 lp->pending_tx_skb = NULL;
380 spin_unlock_irq(&lp->lock);
384 SMC_SELECT_BANK(lp, 0);
385 SMC_SET_RCR(lp, RCR_CLEAR);
386 SMC_SET_TCR(lp, TCR_CLEAR);
390 SMC_SELECT_BANK(lp, 1);
391 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
400 struct smc_local *lp = netdev_priv(dev);
401 void __iomem *ioaddr = lp->base;
406 packet_number = SMC_GET_RXFIFO(lp);
413 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
416 SMC_GET_PKT_HDR(lp, status, packet_len);
434 SMC_WAIT_MMU_BUSY(lp);
435 SMC_SET_MMU_CMD(lp, MC_RELEASE);
462 SMC_WAIT_MMU_BUSY(lp);
463 SMC_SET_MMU_CMD(lp, MC_RELEASE);
472 if (lp->version == 0x90)
482 SMC_PULL_DATA(lp, data, packet_len - 4);
484 SMC_WAIT_MMU_BUSY(lp);
485 SMC_SET_MMU_CMD(lp, MC_RELEASE);
540 struct smc_local *lp = from_tasklet(lp, t, tx_task);
541 struct net_device *dev = lp->dev;
542 void __iomem *ioaddr = lp->base;
550 if (!smc_special_trylock(&lp->lock, flags)) {
552 tasklet_schedule(&lp->tx_task);
556 skb = lp->pending_tx_skb;
558 smc_special_unlock(&lp->lock, flags);
561 lp->pending_tx_skb = NULL;
563 packet_no = SMC_GET_AR(lp);
568 smc_special_unlock(&lp->lock, flags);
573 SMC_SET_PN(lp, packet_no);
574 SMC_SET_PTR(lp, PTR_AUTOINC);
586 SMC_PUT_PKT_HDR(lp, 0, len + 6);
589 SMC_PUSH_DATA(lp, buf, len & ~1);
592 SMC_outw(lp, ((len & 1) ? (0x2000 | buf[len - 1]) : 0), ioaddr,
593 DATA_REG(lp));
607 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
608 smc_special_unlock(&lp->lock, flags);
614 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
631 struct smc_local *lp = netdev_priv(dev);
632 void __iomem *ioaddr = lp->base;
638 BUG_ON(lp->pending_tx_skb != NULL);
660 smc_special_lock(&lp->lock, flags);
663 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
671 status = SMC_GET_INT(lp);
673 SMC_ACK_INT(lp, IM_ALLOC_INT);
678 smc_special_unlock(&lp->lock, flags);
680 lp->pending_tx_skb = skb;
685 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
691 smc_hardware_send_pkt(&lp->tx_task);
704 struct smc_local *lp = netdev_priv(dev);
705 void __iomem *ioaddr = lp->base;
711 packet_no = SMC_GET_TXFIFO(lp);
718 saved_packet = SMC_GET_PN(lp);
719 SMC_SET_PN(lp, packet_no);
722 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
723 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
744 SMC_WAIT_MMU_BUSY(lp);
745 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
748 SMC_WAIT_MMU_BUSY(lp);
749 SMC_SET_PN(lp, saved_packet);
752 SMC_SELECT_BANK(lp, 0);
753 SMC_SET_TCR(lp, lp->tcr_cur_mode);
754 SMC_SELECT_BANK(lp, 2);
762 struct smc_local *lp = netdev_priv(dev);
763 void __iomem *ioaddr = lp->base;
766 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
775 SMC_SET_MII(lp, mii_reg);
777 SMC_SET_MII(lp, mii_reg | MII_MCLK);
784 struct smc_local *lp = netdev_priv(dev);
785 void __iomem *ioaddr = lp->base;
788 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
789 SMC_SET_MII(lp, mii_reg);
792 if (SMC_GET_MII(lp) & MII_MDI)
795 SMC_SET_MII(lp, mii_reg);
797 SMC_SET_MII(lp, mii_reg | MII_MCLK);
809 struct smc_local *lp = netdev_priv(dev);
810 void __iomem *ioaddr = lp->base;
813 SMC_SELECT_BANK(lp, 3);
825 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
830 SMC_SELECT_BANK(lp, 2);
840 struct smc_local *lp = netdev_priv(dev);
841 void __iomem *ioaddr = lp->base;
843 SMC_SELECT_BANK(lp, 3);
852 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
857 SMC_SELECT_BANK(lp, 2);
865 struct smc_local *lp = netdev_priv(dev);
870 lp->phy_type = 0;
890 lp->mii.phy_id = phyaddr & 31;
891 lp->phy_type = id1 << 16 | id2;
902 struct smc_local *lp = netdev_priv(dev);
903 void __iomem *ioaddr = lp->base;
904 int phyaddr = lp->mii.phy_id;
920 if (lp->ctl_rfduplx)
923 if (lp->ctl_rspeed == 100)
930 SMC_SELECT_BANK(lp, 0);
931 SMC_SET_RPC(lp, lp->rpc_cur_mode);
932 SMC_SELECT_BANK(lp, 2);
948 * Must be called with lp->lock locked.
952 struct smc_local *lp = netdev_priv(dev);
959 spin_unlock_irq(&lp->lock);
961 spin_lock_irq(&lp->lock);
979 struct smc_local *lp = netdev_priv(dev);
981 int phy = lp->mii.phy_id;
983 if (lp->phy_type == 0)
989 cancel_work_sync(&lp->phy_configure);
1005 struct smc_local *lp = netdev_priv(dev);
1006 void __iomem *ioaddr = lp->base;
1008 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1010 if (lp->mii.full_duplex) {
1011 lp->tcr_cur_mode |= TCR_SWFDUP;
1013 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1016 SMC_SELECT_BANK(lp, 0);
1017 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1032 struct smc_local *lp =
1034 struct net_device *dev = lp->dev;
1035 void __iomem *ioaddr = lp->base;
1036 int phyaddr = lp->mii.phy_id;
1042 spin_lock_irq(&lp->lock);
1047 if (lp->phy_type == 0)
1065 SMC_SELECT_BANK(lp, 0);
1066 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1069 if (lp->mii.force_media) {
1097 if (lp->ctl_rspeed != 100)
1100 if (!lp->ctl_rfduplx)
1105 lp->mii.advertising = my_ad_caps;
1123 SMC_SELECT_BANK(lp, 2);
1124 spin_unlock_irq(&lp->lock);
1135 struct smc_local *lp = netdev_priv(dev);
1136 int phyaddr = lp->mii.phy_id;
1141 if (lp->phy_type == 0)
1158 struct smc_local *lp = netdev_priv(dev);
1159 void __iomem *ioaddr = lp->base;
1164 SMC_SELECT_BANK(lp, 0);
1165 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1166 SMC_SELECT_BANK(lp, 2);
1174 if (netif_msg_link(lp))
1182 struct smc_local *lp = netdev_priv(dev);
1183 void __iomem *ioaddr = lp->base;
1188 SMC_SELECT_BANK(lp, 1);
1189 ctl = SMC_GET_CTL(lp);
1190 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1191 SMC_SET_CTL(lp, ctl);
1192 SMC_SELECT_BANK(lp, 2);
1202 struct smc_local *lp = netdev_priv(dev);
1203 void __iomem *ioaddr = lp->base;
1209 spin_lock(&lp->lock);
1216 saved_pointer = SMC_GET_PTR(lp);
1217 mask = SMC_GET_INT_MASK(lp);
1218 SMC_SET_INT_MASK(lp, 0);
1224 status = SMC_GET_INT(lp);
1228 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1229 meminfo = SMC_GET_MIR(lp);
1230 SMC_SELECT_BANK(lp, 2); meminfo; }),
1231 SMC_GET_FIFO(lp));
1241 SMC_ACK_INT(lp, IM_TX_INT);
1249 tasklet_hi_schedule(&lp->tx_task);
1256 SMC_SELECT_BANK(lp, 0);
1257 card_stats = SMC_GET_COUNTER(lp);
1258 SMC_SELECT_BANK(lp, 2);
1268 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1269 eph_st = SMC_GET_EPH_STATUS(lp);
1270 SMC_SELECT_BANK(lp, 2); eph_st; }));
1271 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1277 SMC_ACK_INT(lp, IM_MDINT);
1280 SMC_ACK_INT(lp, IM_ERCV_INT);
1286 SMC_SET_PTR(lp, saved_pointer);
1287 SMC_SET_INT_MASK(lp, mask);
1288 spin_unlock(&lp->lock);
1325 struct smc_local *lp = netdev_priv(dev);
1326 void __iomem *ioaddr = lp->base;
1331 spin_lock_irq(&lp->lock);
1332 status = SMC_GET_INT(lp);
1333 mask = SMC_GET_INT_MASK(lp);
1334 fifo = SMC_GET_FIFO(lp);
1335 SMC_SELECT_BANK(lp, 0);
1336 eph_st = SMC_GET_EPH_STATUS(lp);
1337 meminfo = SMC_GET_MIR(lp);
1338 SMC_SELECT_BANK(lp, 2);
1339 spin_unlock_irq(&lp->lock);
1351 if (lp->phy_type != 0)
1352 schedule_work(&lp->phy_configure);
1367 struct smc_local *lp = netdev_priv(dev);
1368 void __iomem *ioaddr = lp->base;
1376 lp->rcr_cur_mode |= RCR_PRMS;
1391 lp->rcr_cur_mode |= RCR_ALMUL;
1427 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1433 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1443 spin_lock_irq(&lp->lock);
1444 SMC_SELECT_BANK(lp, 0);
1445 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1447 SMC_SELECT_BANK(lp, 3);
1448 SMC_SET_MCAST(lp, multicast_table);
1450 SMC_SELECT_BANK(lp, 2);
1451 spin_unlock_irq(&lp->lock);
1463 struct smc_local *lp = netdev_priv(dev);
1468 lp->tcr_cur_mode = TCR_DEFAULT;
1469 lp->rcr_cur_mode = RCR_DEFAULT;
1470 lp->rpc_cur_mode = RPC_DEFAULT |
1471 lp->cfg.leda << RPC_LSXA_SHFT |
1472 lp->cfg.ledb << RPC_LSXB_SHFT;
1478 if (lp->phy_type == 0)
1479 lp->tcr_cur_mode |= TCR_MON_CSN;
1486 if (lp->phy_type != 0)
1487 smc_phy_configure(&lp->phy_configure);
1489 spin_lock_irq(&lp->lock);
1491 spin_unlock_irq(&lp->lock);
1507 struct smc_local *lp = netdev_priv(dev);
1516 tasklet_kill(&lp->tx_task);
1528 struct smc_local *lp = netdev_priv(dev);
1530 if (lp->phy_type != 0) {
1531 spin_lock_irq(&lp->lock);
1532 mii_ethtool_get_link_ksettings(&lp->mii, cmd);
1533 spin_unlock_irq(&lp->lock);
1539 if (lp->ctl_rspeed == 10)
1541 else if (lp->ctl_rspeed == 100)
1546 cmd->base.duplex = lp->tcr_cur_mode & TCR_SWFDUP ?
1560 struct smc_local *lp = netdev_priv(dev);
1563 if (lp->phy_type != 0) {
1564 spin_lock_irq(&lp->lock);
1565 ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
1566 spin_unlock_irq(&lp->lock);
1575 // lp->port = cmd->base.port;
1576 lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
1598 struct smc_local *lp = netdev_priv(dev);
1601 if (lp->phy_type != 0) {
1602 spin_lock_irq(&lp->lock);
1603 ret = mii_nway_restart(&lp->mii);
1604 spin_unlock_irq(&lp->lock);
1612 struct smc_local *lp = netdev_priv(dev);
1613 return lp->msg_enable;
1618 struct smc_local *lp = netdev_priv(dev);
1619 lp->msg_enable = level;
1625 struct smc_local *lp = netdev_priv(dev);
1626 void __iomem *ioaddr = lp->base;
1628 spin_lock_irq(&lp->lock);
1630 SMC_SELECT_BANK(lp, 1);
1631 SMC_SET_GP(lp, word);
1633 SMC_SELECT_BANK(lp, 2);
1634 SMC_SET_PTR(lp, addr);
1636 SMC_SELECT_BANK(lp, 1);
1637 ctl = SMC_GET_CTL(lp);
1638 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
1642 } while (SMC_GET_CTL(lp) & CTL_STORE);
1644 SMC_SET_CTL(lp, ctl);
1645 SMC_SELECT_BANK(lp, 2);
1646 spin_unlock_irq(&lp->lock);
1653 struct smc_local *lp = netdev_priv(dev);
1654 void __iomem *ioaddr = lp->base;
1656 spin_lock_irq(&lp->lock);
1658 SMC_SELECT_BANK(lp, 2);
1659 SMC_SET_PTR(lp, addr | PTR_READ);
1661 SMC_SELECT_BANK(lp, 1);
1662 SMC_SET_GP(lp, 0xffff); /* init to known */
1663 ctl = SMC_GET_CTL(lp);
1664 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
1668 } while (SMC_GET_CTL(lp) & CTL_RELOAD);
1670 *word = SMC_GET_GP(lp);
1672 SMC_SET_CTL(lp, ctl);
1673 SMC_SELECT_BANK(lp, 2);
1674 spin_unlock_irq(&lp->lock);
1772 static int smc_findirq(struct smc_local *lp)
1774 void __iomem *ioaddr = lp->base;
1778 DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1788 SMC_SELECT_BANK(lp, 2);
1789 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1795 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1803 int_status = SMC_GET_INT(lp);
1816 SMC_SET_INT_MASK(lp, 0);
1849 struct smc_local *lp = netdev_priv(dev);
1857 val = SMC_CURRENT_BANK(lp);
1874 SMC_SELECT_BANK(lp, 0);
1875 val = SMC_CURRENT_BANK(lp);
1887 SMC_SELECT_BANK(lp, 1);
1888 val = SMC_GET_BASE(lp);
1900 SMC_SELECT_BANK(lp, 3);
1901 revision_register = SMC_GET_REV(lp);
1918 lp->base = ioaddr;
1919 lp->version = revision_register & 0xff;
1920 spin_lock_init(&lp->lock);
1923 SMC_SELECT_BANK(lp, 1);
1924 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1949 dev->irq = smc_findirq(lp);
1967 tasklet_setup(&lp->tx_task, smc_hardware_send_pkt);
1968 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1969 lp->dev = dev;
1970 lp->mii.phy_id_mask = 0x1f;
1971 lp->mii.reg_num_mask = 0x1f;
1972 lp->mii.force_media = 0;
1973 lp->mii.full_duplex = 0;
1974 lp->mii.dev = dev;
1975 lp->mii.mdio_read = smc_phy_read;
1976 lp->mii.mdio_write = smc_phy_write;
1981 if (lp->version >= (CHIP_91100 << 4))
1989 lp->msg_enable = NETIF_MSG_LINK;
1990 lp->ctl_rfduplx = 0;
1991 lp->ctl_rspeed = 10;
1993 if (lp->version >= (CHIP_91100 << 4)) {
1994 lp->ctl_rfduplx = 1;
1995 lp->ctl_rspeed = 100;
2005 lp->cfg.flags |= SMC91X_USE_DMA;
2007 if (lp->cfg.flags & SMC91X_USE_DMA) {
2012 lp->dma_chan = dma_request_channel(mask, NULL, NULL);
2021 lp->base, dev->irq);
2023 if (lp->dma_chan)
2024 pr_cont(" DMA %p", lp->dma_chan);
2027 lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
2038 if (lp->phy_type == 0) {
2040 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2042 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2049 if (retval && lp->dma_chan)
2050 dma_release_channel(lp->dma_chan);
2058 struct smc_local *lp = netdev_priv(ndev);
2101 if (!SMC_16BIT(lp))
2122 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2137 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2147 struct smc_local *lp = netdev_priv(ndev);
2158 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2165 struct smc_local *lp = netdev_priv(ndev);
2168 if (lp->datacs)
2169 iounmap(lp->datacs);
2171 lp->datacs = NULL;
2233 struct smc_local *lp;
2252 lp = netdev_priv(ndev);
2253 lp->cfg.flags = 0;
2256 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2257 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2259 if (!SMC_8BIT(lp) && !SMC_16BIT(lp)) {
2273 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
2282 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
2291 if (lp->reset_gpio)
2298 lp->cfg.flags |= SMC91X_USE_8BIT;
2300 lp->cfg.flags |= SMC91X_USE_16BIT;
2302 lp->cfg.flags |= SMC91X_USE_32BIT;
2304 lp->cfg.flags |= SMC91X_USE_16BIT;
2308 lp->io_shift = val;
2309 lp->cfg.pxa_u16_align4 =
2315 lp->cfg.flags |= (SMC_CAN_USE_8BIT) ? SMC91X_USE_8BIT : 0;
2316 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2317 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2318 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2321 if (!lp->cfg.leda && !lp->cfg.ledb) {
2322 lp->cfg.leda = RPC_LSA_DEFAULT;
2323 lp->cfg.ledb = RPC_LSB_DEFAULT;
2376 struct smc_local *lp = netdev_priv(ndev);
2377 lp->device = &pdev->dev;
2378 lp->physaddr = res->start;
2408 struct smc_local *lp = netdev_priv(ndev);
2416 if (lp->dma_chan)
2417 dma_release_channel(lp->dma_chan);
2419 iounmap(lp->base);
2454 struct smc_local *lp = netdev_priv(ndev);
2459 if (lp->phy_type != 0)
2460 smc_phy_configure(&lp->phy_configure);