Lines Matching defs:channel
197 static int ef100_ev_probe(struct efx_channel *channel)
200 return efx_nic_alloc_buffer(channel->efx, &channel->eventq.buf,
201 (channel->eventq_mask + 2) *
206 static int ef100_ev_init(struct efx_channel *channel)
208 struct ef100_nic_data *nic_data = channel->efx->nic_data;
211 clear_bit(channel->channel, nic_data->evq_phases);
213 return efx_mcdi_ev_init(channel, false, false);
216 static void ef100_ev_read_ack(struct efx_channel *channel)
221 ERF_GZ_EVQ_ID, channel->channel,
222 ERF_GZ_IDX, channel->eventq_read_ptr &
223 channel->eventq_mask);
225 efx_writed(channel->efx, &evq_prime,
226 efx_reg(channel->efx, ER_GZ_EVQ_INT_PRIME));
229 static int ef100_ev_process(struct efx_channel *channel, int quota)
231 struct efx_nic *efx = channel->efx;
240 if (unlikely(!channel->enabled))
244 evq_phase = test_bit(channel->channel, nic_data->evq_phases);
246 read_ptr = channel->eventq_read_ptr;
250 p_event = efx_event(channel, read_ptr);
258 channel->channel, EFX_QWORD_VAL(*p_event));
264 efx_ef100_ev_rx(channel, p_event);
268 efx_mcdi_process_event(channel, p_event);
271 ef100_ev_tx(channel, p_event);
285 if ((read_ptr & channel->eventq_mask) == 0)
289 channel->eventq_read_ptr = read_ptr;
291 change_bit(channel->channel, nic_data->evq_phases);
309 /* Schedule processing of the channel */
310 efx_schedule_channel_irq(efx->channel[context->index]);
639 static void efx_ef100_ev_test_generate(struct efx_channel *channel)
642 struct efx_nic *efx = channel->efx;
650 MCDI_SET_DWORD(inbuf, DRIVER_EVENT_IN_EVQ, channel->channel);