Lines Matching refs:RTL_R8
678 #define RTL_R8(reg) ioread8 (ioaddr + (reg))
747 if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
863 u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
875 tmp8 = RTL_R8 (Config4);
884 tmp8 = RTL_R8 (Config1);
1145 #define eeprom_delay() (void)RTL_R8(Cfg9346)
1177 (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
1203 #define mdio_delay() RTL_R8(Config4)
1265 retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
1361 irq, RTL_R8 (MediaStatus),
1417 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
1437 tmp = RTL_R8 (ChipCmd);
1605 RTL_R8(Config0), RTL_R8(Config1));
1668 RTL_R8(ChipCmd), RTL_R16(IntrStatus),
1669 RTL_R16(IntrMask), RTL_R8(MediaStatus));
1682 tmp8 = RTL_R8 (ChipCmd);
1861 tmp8 = RTL_R8 (ChipCmd);
1874 tmp8 = RTL_R8 (ChipCmd);
1885 tmp8 = RTL_R8 (ChipCmd);
1957 RTL_R16(RxBufAddr), RTL_R16(RxBufPtr), RTL_R8(ChipCmd));
1960 (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
2072 RTL_R16(RxBufAddr), RTL_R16(RxBufPtr), RTL_R8(ChipCmd));
2312 u8 cfg3 = RTL_R8 (Config3);
2313 u8 cfg5 = RTL_R8 (Config5);
2354 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
2363 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);