Lines Matching defs:fifo
217 void vxge_hw_vpath_tti_ci_set(struct __vxge_hw_fifo *fifo)
223 if (fifo->config->enable != VXGE_HW_FIFO_ENABLE)
226 vp_reg = fifo->vp_reg;
227 config = container_of(fifo->config, struct vxge_hw_vp_config, fifo);
233 fifo->tim_tti_cfg1_saved = val64;
247 void vxge_hw_vpath_dynamic_tti_rtimer_set(struct __vxge_hw_fifo *fifo)
249 u64 val64 = fifo->tim_tti_cfg3_saved;
250 u64 timer = (fifo->rtimer * 1000) / 272;
257 writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]);
1374 * @fifo: fifohandle
1382 static void __vxge_hw_non_offload_db_post(struct __vxge_hw_fifo *fifo,
1388 &fifo->nofl_db->control_0);
1390 writeq(txdl_ptr, &fifo->nofl_db->txdl_ptr);
1395 * the fifo
1396 * @fifoh: Handle to the fifo object used for non offload send
1404 * vxge_hw_fifo_txdl_reserve - Reserve fifo descriptor.
1405 * @fifo: Handle to the fifo object used for non offload send
1410 * Reserve a single TxDL (that is, fifo descriptor)
1416 * for lengthy (e.g., LSO) transmit operation. A single fifo descriptor
1417 * carries up to configured number (fifo.max_frags) of contiguous buffers.
1424 struct __vxge_hw_fifo *fifo,
1431 channel = &fifo->channel;
1440 priv = __vxge_hw_fifo_txdl_priv(fifo, txdp);
1447 priv->alloc_frags = fifo->config->max_frags;
1452 for (i = 0; i < fifo->config->max_frags; i++) {
1464 * @fifo: Handle to the fifo object used for non offload send
1474 * All three APIs fill in the fields of the fifo descriptor,
1478 void vxge_hw_fifo_txdl_buffer_set(struct __vxge_hw_fifo *fifo,
1485 txdl_priv = __vxge_hw_fifo_txdl_priv(fifo, txdlh);
1493 txdp->control_1 |= fifo->interrupt_type;
1495 fifo->tx_intr_num);
1508 fifo->stats->total_buffers++;
1513 * vxge_hw_fifo_txdl_post - Post descriptor on the fifo channel.
1514 * @fifo: Handle to the fifo object used for non offload send
1517 * Post descriptor on the 'fifo' type channel for transmission.
1522 void vxge_hw_fifo_txdl_post(struct __vxge_hw_fifo *fifo, void *txdlh)
1528 txdl_priv = __vxge_hw_fifo_txdl_priv(fifo, txdlh);
1536 vxge_hw_channel_dtr_post(&fifo->channel, txdlh);
1538 __vxge_hw_non_offload_db_post(fifo,
1541 fifo->no_snoop_bits);
1543 fifo->stats->total_posts++;
1544 fifo->stats->common_stats.usage_cnt++;
1545 if (fifo->stats->common_stats.usage_max <
1546 fifo->stats->common_stats.usage_cnt)
1547 fifo->stats->common_stats.usage_max =
1548 fifo->stats->common_stats.usage_cnt;
1553 * @fifo: Handle to the fifo object used for non offload send
1584 struct __vxge_hw_fifo *fifo, void **txdlh,
1591 channel = &fifo->channel;
1610 if (fifo->stats->common_stats.usage_cnt > 0)
1611 fifo->stats->common_stats.usage_cnt--;
1626 * @fifo: Handle to the fifo object used for non offload send
1638 enum vxge_hw_status vxge_hw_fifo_handle_tcode(struct __vxge_hw_fifo *fifo,
1649 fifo->stats->txd_t_code_err_cnt[t_code]++;
1656 * @fifo: Handle to the fifo object used for non offload send
1678 void vxge_hw_fifo_txdl_free(struct __vxge_hw_fifo *fifo, void *txdlh)
1682 channel = &fifo->channel;
2158 * interrupts(Can be repeated). If fifo or ring are not enabled
2397 * @fifo: Handle to the fifo object used for non offload send
2409 enum vxge_hw_status vxge_hw_vpath_poll_tx(struct __vxge_hw_fifo *fifo,
2418 channel = &fifo->channel;
2420 status = vxge_hw_fifo_txdl_next_completed(fifo,
2423 if (fifo->callback(fifo, first_txdlh, t_code,