Lines Matching defs:fifo
541 struct fifo_info *fifo, int cnt, u8 multiq)
545 if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no))
546 netif_wake_subqueue(fifo->dev, fifo->fifo_no);
547 } else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) {
548 if (netif_queue_stopped(fifo->dev)) {
549 fifo->queue_state = FIFO_QUEUE_START;
550 netif_wake_queue(fifo->dev);
612 struct fifo_info *fifo = &mac_control->fifos[i];
617 fifo->list_info = kzalloc(list_holder_size, GFP_KERNEL);
618 if (!fifo->list_info) {
627 struct fifo_info *fifo = &mac_control->fifos[i];
630 fifo->tx_curr_put_info.offset = 0;
631 fifo->tx_curr_put_info.fifo_len = tx_cfg->fifo_len - 1;
632 fifo->tx_curr_get_info.offset = 0;
633 fifo->tx_curr_get_info.fifo_len = tx_cfg->fifo_len - 1;
634 fifo->fifo_no = i;
635 fifo->nic = nic;
636 fifo->max_txds = MAX_SKB_FRAGS + 2;
637 fifo->dev = dev;
675 fifo->list_info[l].list_virt_addr =
677 fifo->list_info[l].list_phy_addr =
685 struct fifo_info *fifo = &mac_control->fifos[i];
689 fifo->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
690 if (!fifo->ufo_in_band_v)
896 struct fifo_info *fifo = &mac_control->fifos[i];
904 if (!fifo->list_info)
907 fli = &fifo->list_info[mem_blks];
928 kfree(fifo->list_info);
985 struct fifo_info *fifo = &mac_control->fifos[i];
988 if (fifo->ufo_in_band_v) {
991 kfree(fifo->ufo_in_band_v);
2313 * @fifo_data: fifo data pointer
2378 struct fifo_info *fifo = &mac_control->fifos[i];
2381 spin_lock_irqsave(&fifo->tx_lock, flags);
2383 txdp = fifo->list_info[j].list_virt_addr;
2394 fifo->tx_curr_get_info.offset = 0;
2395 fifo->tx_curr_put_info.offset = 0;
2396 spin_unlock_irqrestore(&fifo->tx_lock, flags);
2984 * @fifo_data : fifo data pointer
4012 struct fifo_info *fifo = NULL;
4069 /* get fifo number based on skb->priority value */
4072 fifo = &mac_control->fifos[queue];
4074 spin_lock_irqsave(&fifo->tx_lock, flags);
4077 if (__netif_subqueue_stopped(dev, fifo->fifo_no)) {
4078 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4081 } else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) {
4083 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4088 put_off = (u16)fifo->tx_curr_put_info.offset;
4089 get_off = (u16)fifo->tx_curr_get_info.offset;
4090 txdp = fifo->list_info[put_off].list_virt_addr;
4092 queue_len = fifo->tx_curr_put_info.fifo_len + 1;
4097 s2io_stop_tx_queue(sp, fifo->fifo_no);
4099 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4115 txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
4150 val64 = fifo->list_info[put_off].list_phy_addr;
4161 if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
4163 fifo->tx_curr_put_info.offset = put_off;
4171 s2io_stop_tx_queue(sp, fifo->fifo_no);
4174 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4177 tx_intr_handler(fifo);
4183 s2io_stop_tx_queue(sp, fifo->fifo_no);
4186 spin_unlock_irqrestore(&fifo->tx_lock, flags);
7538 "one fifo. Disabling Tx steering.\n");
7995 struct fifo_info *fifo = &mac_control->fifos[i];
7997 spin_lock_init(&fifo->tx_lock);
8057 DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name,
8073 struct fifo_info *fifo = &mac_control->fifos[i];
8075 fifo->multiq = config->multiq;