Lines Matching refs:vcap
50 const struct vcap_props *vcap)
52 return ocelot_target_read(ocelot, vcap->target, VCAP_CORE_UPDATE_CTRL);
55 static void vcap_cmd(struct ocelot *ocelot, const struct vcap_props *vcap,
62 if ((sel & VCAP_SEL_ENTRY) && ix >= vcap->entry_count)
74 ocelot_target_write(ocelot, vcap->target, value, VCAP_CORE_UPDATE_CTRL);
78 10, 100000, false, ocelot, vcap);
82 static void vcap_row_cmd(struct ocelot *ocelot, const struct vcap_props *vcap,
85 vcap_cmd(ocelot, vcap, vcap->entry_count - row - 1, cmd, sel);
89 const struct vcap_props *vcap,
94 entry_words = DIV_ROUND_UP(vcap->entry_width, ENTRY_WIDTH);
97 ocelot_target_write_rix(ocelot, vcap->target, data->entry[i],
99 ocelot_target_write_rix(ocelot, vcap->target, ~data->mask[i],
102 ocelot_target_write(ocelot, vcap->target, data->tg, VCAP_CACHE_TG_DAT);
106 const struct vcap_props *vcap,
111 entry_words = DIV_ROUND_UP(vcap->entry_width, ENTRY_WIDTH);
114 data->entry[i] = ocelot_target_read_rix(ocelot, vcap->target,
117 data->mask[i] = ~ocelot_target_read_rix(ocelot, vcap->target,
120 data->tg = ocelot_target_read(ocelot, vcap->target, VCAP_CACHE_TG_DAT);
124 const struct vcap_props *vcap,
131 width = vcap->action_type_width;
137 action_words = DIV_ROUND_UP(vcap->action_width, ENTRY_WIDTH);
140 ocelot_target_write_rix(ocelot, vcap->target, data->action[i],
143 for (i = 0; i < vcap->counter_words; i++)
144 ocelot_target_write_rix(ocelot, vcap->target, data->counter[i],
149 const struct vcap_props *vcap,
155 action_words = DIV_ROUND_UP(vcap->action_width, ENTRY_WIDTH);
158 data->action[i] = ocelot_target_read_rix(ocelot, vcap->target,
162 for (i = 0; i < vcap->counter_words; i++)
163 data->counter[i] = ocelot_target_read_rix(ocelot, vcap->target,
168 width = vcap->action_type_width;
173 static void vcap_data_offset_get(const struct vcap_props *vcap,
178 u32 width = vcap->tg_width;
195 num_subwords_per_entry = (vcap->sw_count / num_entries_per_row);
196 base = (vcap->sw_count - col * num_subwords_per_entry -
208 data->key_offset = (base * vcap->entry_width) / vcap->sw_count;
210 vcap->counter_width);
212 width = vcap->action_table[i].width;
213 num_subwords_per_action = vcap->action_table[i].count;
216 data->action_offset += vcap->action_type_width;
254 static void vcap_key_set(const struct vcap_props *vcap, struct vcap_data *data,
257 u32 offset = vcap->keys[field].offset;
258 u32 length = vcap->keys[field].length;
263 static void vcap_key_bytes_set(const struct vcap_props *vcap,
267 u32 offset = vcap->keys[field].offset;
268 u32 count = vcap->keys[field].length;
294 static void vcap_key_l4_port_set(const struct vcap_props *vcap,
298 u32 offset = vcap->keys[field].offset;
299 u32 length = vcap->keys[field].length;
306 static void vcap_key_bit_set(const struct vcap_props *vcap,
312 u32 offset = vcap->keys[field].offset;
313 u32 length = vcap->keys[field].length;
320 static void vcap_action_set(const struct vcap_props *vcap,
323 int offset = vcap->actions[field].offset;
324 int length = vcap->actions[field].length;
333 const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS2];
336 vcap_action_set(vcap, data, VCAP_IS2_ACT_MASK_MODE, a->mask_mode);
337 vcap_action_set(vcap, data, VCAP_IS2_ACT_PORT_MASK, a->port_mask);
338 vcap_action_set(vcap, data, VCAP_IS2_ACT_POLICE_ENA, a->police_ena);
339 vcap_action_set(vcap, data, VCAP_IS2_ACT_POLICE_IDX, a->pol_ix);
340 vcap_action_set(vcap, data, VCAP_IS2_ACT_CPU_QU_NUM, a->cpu_qu_num);
341 vcap_action_set(vcap, data, VCAP_IS2_ACT_CPU_COPY_ENA, a->cpu_copy_ena);
347 const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS2];
358 vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
359 vcap_cache2entry(ocelot, vcap, &data);
360 vcap_cache2action(ocelot, vcap, &data);
363 vcap_data_offset_get(vcap, &data, ix);
370 vcap_key_set(vcap, &data, VCAP_IS2_HK_PAG, filter->pag, 0xff);
371 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_FIRST,
374 vcap_key_set(vcap, &data, VCAP_IS2_HK_IGR_PORT_MASK, 0,
376 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_HOST_MATCH,
378 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L2_MC, filter->dmac_mc);
379 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L2_BC, filter->dmac_bc);
380 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_VLAN_TAGGED, tag->tagged);
381 vcap_key_set(vcap, &data, VCAP_IS2_HK_VID,
383 vcap_key_set(vcap, &data, VCAP_IS2_HK_PCP,
385 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_DEI, tag->dei);
392 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
394 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
396 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_ETYPE,
399 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0,
401 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD1,
403 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD2,
405 vcap_key_bytes_set(vcap, &data,
414 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
416 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
422 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_LLC_L2_LLC,
430 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_DMAC,
432 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L2_SMAC,
434 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_SNAP_L2_SNAP,
443 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_SMAC,
445 vcap_key_bit_set(vcap, &data,
448 vcap_key_bit_set(vcap, &data,
451 vcap_key_bit_set(vcap, &data,
454 vcap_key_bit_set(vcap, &data,
457 vcap_key_bit_set(vcap, &data,
460 vcap_key_bit_set(vcap, &data,
469 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_OPCODE,
471 vcap_key_bytes_set(vcap, &data,
474 vcap_key_bytes_set(vcap, &data,
477 vcap_key_set(vcap, &data, VCAP_IS2_HK_MAC_ARP_DIP_EQ_SIP,
546 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_IP4,
548 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L3_FRAGMENT,
550 vcap_key_set(vcap, &data, VCAP_IS2_HK_L3_FRAG_OFS_GT0, 0, 0);
551 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L3_OPTIONS,
553 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_IP4_L3_TTL_GT0,
555 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_TOS,
557 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_IP4_DIP,
559 vcap_key_bytes_set(vcap, &data, VCAP_IS2_HK_L3_IP4_SIP,
561 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_DIP_EQ_SIP,
570 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_TCP, tcp);
571 vcap_key_l4_port_set(vcap, &data,
573 vcap_key_l4_port_set(vcap, &data,
575 vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_RNG, 0, 0);
576 vcap_key_bit_set(vcap, &data,
579 vcap_key_bit_set(vcap, &data,
582 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_FIN,
584 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_SYN,
586 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_RST,
588 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_PSH,
590 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_ACK,
592 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L4_URG,
594 vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_1588_DOM,
596 vcap_key_set(vcap, &data, VCAP_IS2_HK_L4_1588_VER,
610 vcap_key_bytes_set(vcap, &data,
613 vcap_key_bytes_set(vcap, &data,
623 count = vcap->entry_width / 2;
627 for (i = vcap->keys[VCAP_IS2_HK_L2_DMAC].offset;
634 vcap_key_set(vcap, &data, VCAP_IS2_TYPE, type, type_mask);
637 vcap->counter_width, filter->stats.pkts);
640 vcap_entry2cache(ocelot, vcap, &data);
641 vcap_action2cache(ocelot, vcap, &data);
642 vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
648 const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS1];
651 vcap_action_set(vcap, data, VCAP_IS1_ACT_VID_REPLACE_ENA,
653 vcap_action_set(vcap, data, VCAP_IS1_ACT_VID_ADD_VAL, a->vid);
654 vcap_action_set(vcap, data, VCAP_IS1_ACT_VLAN_POP_CNT_ENA,
656 vcap_action_set(vcap, data, VCAP_IS1_ACT_VLAN_POP_CNT,
658 vcap_action_set(vcap, data, VCAP_IS1_ACT_PCP_DEI_ENA, a->pcp_dei_ena);
659 vcap_action_set(vcap, data, VCAP_IS1_ACT_PCP_VAL, a->pcp);
660 vcap_action_set(vcap, data, VCAP_IS1_ACT_DEI_VAL, a->dei);
661 vcap_action_set(vcap, data, VCAP_IS1_ACT_QOS_ENA, a->qos_ena);
662 vcap_action_set(vcap, data, VCAP_IS1_ACT_QOS_VAL, a->qos_val);
663 vcap_action_set(vcap, data, VCAP_IS1_ACT_PAG_OVERRIDE_MASK,
665 vcap_action_set(vcap, data, VCAP_IS1_ACT_PAG_VAL, a->pag_val);
671 const struct vcap_props *vcap = &ocelot->vcap[VCAP_IS1];
682 vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
683 vcap_cache2entry(ocelot, vcap, &data);
684 vcap_cache2action(ocelot, vcap, &data);
688 vcap_data_offset_get(vcap, &data, ix);
693 vcap_key_set(vcap, &data, VCAP_IS1_HK_LOOKUP, filter->lookup, 0x3);
694 vcap_key_set(vcap, &data, VCAP_IS1_HK_IGR_PORT_MASK, 0,
696 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_L2_MC, filter->dmac_mc);
697 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_L2_BC, filter->dmac_bc);
698 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_VLAN_TAGGED, tag->tagged);
699 vcap_key_set(vcap, &data, VCAP_IS1_HK_VID,
701 vcap_key_set(vcap, &data, VCAP_IS1_HK_PCP,
709 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_L2_SMAC,
711 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_ETYPE,
724 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_IP_SNAP,
726 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_IP4,
728 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_ETYPE_LEN,
730 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_L3_IP4_SIP,
738 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TCP_UDP, tcp_udp);
746 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TCP, tcp);
747 vcap_key_l4_port_set(vcap, &data, VCAP_IS1_HK_L4_SPORT,
750 vcap_key_l4_port_set(vcap, &data, VCAP_IS1_HK_ETYPE,
760 vcap_key_bytes_set(vcap, &data, VCAP_IS1_HK_ETYPE,
767 vcap_key_bit_set(vcap, &data, VCAP_IS1_HK_TYPE,
772 vcap->counter_width, filter->stats.pkts);
775 vcap_entry2cache(ocelot, vcap, &data);
776 vcap_action2cache(ocelot, vcap, &data);
777 vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
783 const struct vcap_props *vcap = &ocelot->vcap[VCAP_ES0];
786 vcap_action_set(vcap, data, VCAP_ES0_ACT_PUSH_OUTER_TAG,
788 vcap_action_set(vcap, data, VCAP_ES0_ACT_PUSH_INNER_TAG,
790 vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_TPID_SEL,
792 vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_VID_SEL,
794 vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_A_PCP_SEL,
796 vcap_action_set(vcap, data, VCAP_ES0_ACT_VID_A_VAL, a->vid_a_val);
797 vcap_action_set(vcap, data, VCAP_ES0_ACT_PCP_A_VAL, a->pcp_a_val);
798 vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_TPID_SEL,
800 vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_VID_SEL,
802 vcap_action_set(vcap, data, VCAP_ES0_ACT_TAG_B_PCP_SEL,
804 vcap_action_set(vcap, data, VCAP_ES0_ACT_VID_B_VAL, a->vid_b_val);
805 vcap_action_set(vcap, data, VCAP_ES0_ACT_PCP_B_VAL, a->pcp_b_val);
811 const struct vcap_props *vcap = &ocelot->vcap[VCAP_ES0];
821 vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_ALL);
822 vcap_cache2entry(ocelot, vcap, &data);
823 vcap_cache2action(ocelot, vcap, &data);
827 vcap_data_offset_get(vcap, &data, ix);
832 vcap_key_set(vcap, &data, VCAP_ES0_IGR_PORT, filter->ingress_port.value,
834 vcap_key_set(vcap, &data, VCAP_ES0_EGR_PORT, filter->egress_port.value,
836 vcap_key_bit_set(vcap, &data, VCAP_ES0_L2_MC, filter->dmac_mc);
837 vcap_key_bit_set(vcap, &data, VCAP_ES0_L2_BC, filter->dmac_bc);
838 vcap_key_set(vcap, &data, VCAP_ES0_VID,
840 vcap_key_set(vcap, &data, VCAP_ES0_PCP,
845 vcap->counter_width, filter->stats.pkts);
848 vcap_entry2cache(ocelot, vcap, &data);
849 vcap_action2cache(ocelot, vcap, &data);
850 vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_WRITE, VCAP_SEL_ALL);
856 const struct vcap_props *vcap = &ocelot->vcap[filter->block_id];
868 vcap_row_cmd(ocelot, vcap, row, VCAP_CMD_READ, VCAP_SEL_COUNTER);
869 vcap_cache2action(ocelot, vcap, &data);
870 vcap_data_offset_get(vcap, &data, ix);
872 vcap->counter_width);
1237 const struct vcap_props *vcap)
1243 vcap_entry2cache(ocelot, vcap, &data);
1244 ocelot_target_write(ocelot, vcap->target, vcap->entry_count,
1246 vcap_cmd(ocelot, vcap, 0, VCAP_CMD_INITIALIZE, VCAP_SEL_ENTRY);
1248 vcap_action2cache(ocelot, vcap, &data);
1249 ocelot_target_write(ocelot, vcap->target, vcap->action_count,
1251 vcap_cmd(ocelot, vcap, 0, VCAP_CMD_INITIALIZE,
1256 struct vcap_props *vcap)
1262 version = ocelot_target_read(ocelot, vcap->target,
1269 vcap->tg_width = ocelot_target_read(ocelot, vcap->target,
1272 vcap->sw_count = ocelot_target_read(ocelot, vcap->target,
1277 vcap->entry_count = ocelot_target_read(ocelot, vcap->target,
1305 vcap->entry_width = ocelot_target_read(ocelot, vcap->target,
1307 vcap->entry_width -= vcap->tg_width * vcap->sw_count;
1308 num_default_actions = ocelot_target_read(ocelot, vcap->target,
1310 vcap->action_count = vcap->entry_count + num_default_actions;
1311 vcap->action_width = ocelot_target_read(ocelot, vcap->target,
1318 vcap->counter_words = vcap->sw_count;
1319 counter_memory_width = ocelot_target_read(ocelot, vcap->target,
1321 vcap->counter_width = counter_memory_width / vcap->counter_words;
1345 struct vcap_props *vcap = &ocelot->vcap[i];
1350 ocelot_vcap_detect_constants(ocelot, vcap);
1351 ocelot_vcap_init_one(ocelot, vcap);