Lines Matching refs:ECON1
199 /* These registers (EIE, EIR, ESTAT, ECON2, ECON1)
202 if (addr >= EIE && addr <= ECON1)
208 spi_write_op(priv, ENC28J60_BIT_FIELD_SET, ECON1,
211 spi_write_op(priv, ENC28J60_BIT_FIELD_CLR, ECON1,
216 spi_write_op(priv, ENC28J60_BIT_FIELD_SET, ECON1,
219 spi_write_op(priv, ENC28J60_BIT_FIELD_CLR, ECON1,
535 "Cntrl: ECON1 ECON2 ESTAT EIR EIE\n"
545 nolock_regb_read(priv, ECON1), nolock_regb_read(priv, ECON2),
636 nolock_reg_bfclr(priv, ECON1, ECON1_RXEN);
638 poll_ready(priv, ECON1, ECON1_TXRTS, 0);
661 /* Clear ECON1 */
662 spi_write_op(priv, ENC28J60_WRITE_CTRL_REG, ECON1, 0x00);
762 nolock_reg_bfset(priv, ECON1, ECON1_RXEN);
772 nolock_reg_bfclr(priv, ECON1, ECON1_RXEN);
922 nolock_reg_bfclr(priv, ECON1, ECON1_RXEN);
923 nolock_reg_bfset(priv, ECON1, ECON1_RXRST);
924 nolock_reg_bfclr(priv, ECON1, ECON1_RXRST);
927 nolock_reg_bfset(priv, ECON1, ECON1_RXEN);
1086 locked_reg_bfclr(priv, ECON1, ECON1_TXRTS);
1182 locked_reg_bfclr(priv, ECON1, ECON1_TXRTS);
1188 nolock_reg_bfset(priv, ECON1, ECON1_TXRST);
1189 nolock_reg_bfclr(priv, ECON1, ECON1_TXRST);
1199 locked_reg_bfset(priv, ECON1,
1278 locked_reg_bfset(priv, ECON1, ECON1_TXRTS);