Lines Matching defs:width
922 u16 speed, u16 width)
928 width);
933 mlxsw_sx_port_speed_by_width_set(struct mlxsw_sx_port *mlxsw_sx_port, u8 width)
936 u32 upper_speed = MLXSW_SX_PORT_BASE_SPEED * width;
958 u8 module, u8 width)
1019 err = mlxsw_sx_port_speed_by_width_set(mlxsw_sx_port, width);
1083 u8 module, u8 width)
1095 err = __mlxsw_sx_port_eth_create(mlxsw_sx, local_port, module, width);
1124 u8 module, u8 width)
1159 /* Supports all speeds from SDR to FDR (bitmask) and support bus width
1247 u8 module, width;
1258 &width);
1261 if (!width)
1263 err = mlxsw_sx_port_eth_create(mlxsw_sx, i, module, width);
1356 u8 module, width;
1370 &width);
1376 width);
1379 width);