Lines Matching defs:priority
867 * untagged VLAN membership (u bit is set) will be tagged with priority tag
983 * When set, priority tagged frames on the ingress are allowed (default).
2599 * Note: priority does not have to be unique per rule.
2600 * Within a region, higher priority should have lower offset (no limitation
2604 MLXSW_ITEM32(reg, ptce2, priority, 0x04, 0, 24);
2641 u16 offset, u32 priority)
2647 mlxsw_reg_ptce2_priority_set(payload, priority);
2844 MLXSW_ITEM32(reg, ptce3, priority, 0x04, 0, 24);
2944 u32 priority,
2954 mlxsw_reg_ptce3_priority_set(payload, priority);
3236 * This register controls the port policy to calculate the switch priority and
3440 * Configures the mapping between the packet switch priority and the
3464 * Switch priority.
3615 * 0 - Strict priority
3626 * transmission selection algorithm is strict priority.
4560 * Bit per priority indicating if Tx flow control policy should be
4567 * Bit per priority indicating if Rx flow control policy should be
4590 * Priority based flow control policy on Tx[7:0]. Per-priority bit mask:
4591 * 0 - Never generate priority Pause frames on the specified priority
4593 * 1 - Generate priority Pause frames according to Rx buffer threshold on
4594 * the specified priority.
4618 * Priority based flow control policy on Rx[7:0]. Per-priority bit mask:
4619 * 0 - Ignore incoming priority Pause frames on the specified priority
4621 * 1 - Respect incoming priority Pause frames on the specified priority.
4719 * Priority for counter set that support per priority, valid values: 0-7.
5171 * Configures the switch priority to buffer table.
5209 * Bit <i> is a flag for updating the mapping for switch priority <i>.
5215 * Mapping of switch priority <i> to one of the allocated receive port
5223 * Bit <i> is a flag for updating the mapping for switch priority <i+8>.
5233 * Spectrum, as it maps untagged packets based on the default switch priority.
5238 * Mapping of switch priority <i+8> to one of the allocated receive port
5772 * Trap group priority.
5775 * register HPKT) with the highest priority.
5776 * Supported values are 0-7, with 7 represnting the highest priority.
5779 * Note: In SwitchX-2 this field is ignored and the priority value is replaced
5782 MLXSW_ITEM32(reg, htgt, priority, 0x0C, 0, 4);
5805 u8 priority, u8 tc)
5822 mlxsw_reg_htgt_priority_set(payload, priority);
5953 * Update switch priority and packet color.
6685 * Controls the mapping from DSCP field to switch priority on routed packets
10817 * Association of the port-priority to a pool.
10965 * Association of the port-priority to a pool.
11016 * Bit vector for all switch priority groups.
11018 * are affected by the set operation. Configuration of any other priority