Lines Matching refs:dev
199 struct mlx4_dev *dev = &priv->dev;
201 ctx->val.vbool = dev->persist->crdump.snapshot_enable;
209 struct mlx4_dev *dev = &priv->dev;
211 dev->persist->crdump.snapshot_enable = ctx->val.vbool;
293 static inline void mlx4_set_num_reserved_uars(struct mlx4_dev *dev,
300 dev->caps.reserved_uars =
302 mlx4_get_num_reserved_uar(dev),
304 (1 << (PAGE_SHIFT - dev->uar_page_shift)));
307 int mlx4_check_port_params(struct mlx4_dev *dev,
312 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
313 for (i = 0; i < dev->caps.num_ports - 1; i++) {
315 mlx4_err(dev, "Only same port types supported on this HCA, aborting\n");
321 for (i = 0; i < dev->caps.num_ports; i++) {
322 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
323 mlx4_err(dev, "Requested port type for port %d is not supported on this HCA\n",
331 static void mlx4_set_port_mask(struct mlx4_dev *dev)
335 for (i = 1; i <= dev->caps.num_ports; ++i)
336 dev->caps.port_mask[i] = dev->caps.port_type[i];
343 static int mlx4_query_func(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
348 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) {
349 err = mlx4_QUERY_FUNC(dev, &func, 0);
351 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
362 static void mlx4_enable_cqe_eqe_stride(struct mlx4_dev *dev)
364 struct mlx4_caps *dev_cap = &dev->caps;
382 mlx4_dbg(dev, "Enabling CQE stride cacheLine supported\n");
387 if (mlx4_is_master(dev))
391 mlx4_dbg(dev, "Disabling CQE stride, cacheLine size unsupported\n");
397 static int _mlx4_dev_port(struct mlx4_dev *dev, int port,
400 dev->caps.vl_cap[port] = port_cap->max_vl;
401 dev->caps.ib_mtu_cap[port] = port_cap->ib_mtu;
402 dev->phys_caps.gid_phys_table_len[port] = port_cap->max_gids;
403 dev->phys_caps.pkey_phys_table_len[port] = port_cap->max_pkeys;
407 dev->caps.gid_table_len[port] = port_cap->max_gids;
408 dev->caps.pkey_table_len[port] = port_cap->max_pkeys;
409 dev->caps.port_width_cap[port] = port_cap->max_port_width;
410 dev->caps.eth_mtu_cap[port] = port_cap->eth_mtu;
411 dev->caps.max_tc_eth = port_cap->max_tc_eth;
412 dev->caps.def_mac[port] = port_cap->def_mac;
413 dev->caps.supported_type[port] = port_cap->supported_port_types;
414 dev->caps.suggested_type[port] = port_cap->suggested_type;
415 dev->caps.default_sense[port] = port_cap->default_sense;
416 dev->caps.trans_type[port] = port_cap->trans_type;
417 dev->caps.vendor_oui[port] = port_cap->vendor_oui;
418 dev->caps.wavelength[port] = port_cap->wavelength;
419 dev->caps.trans_code[port] = port_cap->trans_code;
424 static int mlx4_dev_port(struct mlx4_dev *dev, int port,
429 err = mlx4_QUERY_PORT(dev, port, port_cap);
432 mlx4_err(dev, "QUERY_PORT command failed.\n");
437 static inline void mlx4_enable_ignore_fcs(struct mlx4_dev *dev)
439 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS))
442 if (mlx4_is_mfunc(dev)) {
443 mlx4_dbg(dev, "SRIOV mode - Disabling Ignore FCS");
444 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS;
448 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)) {
449 mlx4_dbg(dev,
451 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS;
457 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
462 err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
464 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting\n");
467 mlx4_dev_cap_dump(dev, dev_cap);
470 mlx4_err(dev, "HCA minimum page size of %d bigger than kernel PAGE_SIZE of %ld, aborting\n",
475 mlx4_err(dev, "HCA has %d ports, but we only support %d, aborting\n",
480 if (dev_cap->uar_size > pci_resource_len(dev->persist->pdev, 2)) {
481 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than PCI resource 2 size of 0x%llx, aborting\n",
484 pci_resource_len(dev->persist->pdev, 2));
488 dev->caps.num_ports = dev_cap->num_ports;
489 dev->caps.num_sys_eqs = dev_cap->num_sys_eqs;
490 dev->phys_caps.num_phys_eqs = dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS ?
491 dev->caps.num_sys_eqs :
493 for (i = 1; i <= dev->caps.num_ports; ++i) {
494 err = _mlx4_dev_port(dev, i, dev_cap->port_cap + i);
496 mlx4_err(dev, "QUERY_PORT command failed, aborting\n");
501 dev->caps.map_clock_to_user = dev_cap->map_clock_to_user;
502 dev->caps.uar_page_size = PAGE_SIZE;
503 dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE;
504 dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
505 dev->caps.bf_reg_size = dev_cap->bf_reg_size;
506 dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page;
507 dev->caps.max_sq_sg = dev_cap->max_sq_sg;
508 dev->caps.max_rq_sg = dev_cap->max_rq_sg;
509 dev->caps.max_wqes = dev_cap->max_qp_sz;
510 dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp;
511 dev->caps.max_srq_wqes = dev_cap->max_srq_sz;
512 dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1;
513 dev->caps.reserved_srqs = dev_cap->reserved_srqs;
514 dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz;
515 dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz;
520 dev->caps.max_cqes = dev_cap->max_cq_sz - 1;
521 dev->caps.reserved_cqs = dev_cap->reserved_cqs;
522 dev->caps.reserved_eqs = dev_cap->reserved_eqs;
523 dev->caps.reserved_mtts = dev_cap->reserved_mtts;
524 dev->caps.reserved_mrws = dev_cap->reserved_mrws;
526 dev->caps.reserved_pds = dev_cap->reserved_pds;
527 dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
529 dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
531 dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz;
533 dev->caps.max_msg_sz = dev_cap->max_msg_sz;
534 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1);
535 dev->caps.flags = dev_cap->flags;
536 dev->caps.flags2 = dev_cap->flags2;
537 dev->caps.bmme_flags = dev_cap->bmme_flags;
538 dev->caps.reserved_lkey = dev_cap->reserved_lkey;
539 dev->caps.stat_rate_support = dev_cap->stat_rate_support;
540 dev->caps.max_gso_sz = dev_cap->max_gso_sz;
541 dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz;
542 dev->caps.wol_port[1] = dev_cap->wol_port[1];
543 dev->caps.wol_port[2] = dev_cap->wol_port[2];
544 dev->caps.health_buffer_addrs = dev_cap->health_buffer_addrs;
547 if (!mlx4_is_slave(dev)) {
551 if (enable_4k_uar || !dev->persist->num_vfs)
552 dev->uar_page_shift = DEFAULT_UAR_PAGE_SHIFT;
554 dev->uar_page_shift = PAGE_SHIFT;
556 mlx4_set_num_reserved_uars(dev, dev_cap);
559 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN) {
563 err = mlx4_QUERY_HCA(dev, &hca_param);
571 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_PHV_EN;
575 if (mlx4_priv(dev)->pci_dev_data & MLX4_PCI_DEV_FORCE_SENSE_PORT)
576 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
578 if (mlx4_is_mfunc(dev))
579 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
582 dev->caps.log_num_macs = MLX4_MIN_LOG_NUM_MAC;
583 dev->caps.log_num_vlans = MLX4_MIN_LOG_NUM_VLANS;
585 dev->caps.log_num_macs = log_num_mac;
586 dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
589 for (i = 1; i <= dev->caps.num_ports; ++i) {
590 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
591 if (dev->caps.supported_type[i]) {
593 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
594 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
596 else if (dev->caps.supported_type[i] ==
598 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
604 dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
607 dev->caps.port_type[i] = port_type_array[i - 1];
616 mlx4_priv(dev)->sense.sense_allowed[i] =
617 ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) &&
618 (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
619 (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT));
626 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) {
628 dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO;
629 mlx4_SENSE_PORT(dev, i, &sensed_port);
631 dev->caps.port_type[i] = sensed_port;
633 dev->caps.possible_type[i] = dev->caps.port_type[i];
636 if (dev->caps.log_num_macs > dev_cap->port_cap[i].log_max_macs) {
637 dev->caps.log_num_macs = dev_cap->port_cap[i].log_max_macs;
638 mlx4_warn(dev, "Requested number of MACs is too much for port %d, reducing to %d\n",
639 i, 1 << dev->caps.log_num_macs);
641 if (dev->caps.log_num_vlans > dev_cap->port_cap[i].log_max_vlans) {
642 dev->caps.log_num_vlans = dev_cap->port_cap[i].log_max_vlans;
643 mlx4_warn(dev, "Requested number of VLANs is too much for port %d, reducing to %d\n",
644 i, 1 << dev->caps.log_num_vlans);
648 if (mlx4_is_master(dev) && (dev->caps.num_ports == 2) &&
651 mlx4_warn(dev,
653 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_QOS_VPP;
656 dev->caps.max_counters = dev_cap->max_counters;
658 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
659 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
660 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
661 (1 << dev->caps.log_num_macs) *
662 (1 << dev->caps.log_num_vlans) *
663 dev->caps.num_ports;
664 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
667 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)
668 dev->caps.dmfs_high_rate_qpn_base = dev_cap->dmfs_high_rate_qpn_base;
670 dev->caps.dmfs_high_rate_qpn_base =
671 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW];
674 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) {
675 dev->caps.dmfs_high_rate_qpn_range = dev_cap->dmfs_high_rate_qpn_range;
676 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DEFAULT;
677 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_FS_A0;
679 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_NOT_SUPPORTED;
680 dev->caps.dmfs_high_rate_qpn_base =
681 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW];
682 dev->caps.dmfs_high_rate_qpn_range = MLX4_A0_STEERING_TABLE_SIZE;
685 dev->caps.rl_caps = dev_cap->rl_caps;
687 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_RSS_RAW_ETH] =
688 dev->caps.dmfs_high_rate_qpn_range;
690 dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
691 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
692 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
693 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
695 dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0;
697 if (!enable_64b_cqe_eqe && !mlx4_is_slave(dev)) {
700 mlx4_warn(dev, "64B EQEs/CQEs supported by the device but not enabled\n");
701 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE;
702 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE;
708 mlx4_warn(dev, "Disabling EQE/CQE stride per user request\n");
714 if ((dev->caps.flags &
716 mlx4_is_master(dev))
717 dev->caps.function_caps |= MLX4_FUNC_CAP_64B_EQE_CQE;
719 if (!mlx4_is_slave(dev)) {
720 mlx4_enable_cqe_eqe_stride(dev);
721 dev->caps.alloc_res_qp_mask =
722 (dev->caps.bf_reg_size ? MLX4_RESERVE_ETH_BF_QP : 0) |
725 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) &&
726 dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
727 mlx4_warn(dev, "Old device ETS support detected\n");
728 mlx4_warn(dev, "Consider upgrading device FW.\n");
729 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_ETS_CFG;
733 dev->caps.alloc_res_qp_mask = 0;
736 mlx4_enable_ignore_fcs(dev);
742 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
744 struct mlx4_priv *priv = mlx4_priv(dev);
749 for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
753 mlx4_warn(dev, "%s: slave: %d is still active\n",
761 int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey)
765 if (qpn >= dev->phys_caps.base_tunnel_sqpn + 8 * MLX4_MFUNC_MAX ||
766 qpn < dev->phys_caps.base_proxy_sqpn)
769 if (qpn >= dev->phys_caps.base_tunnel_sqpn)
771 qk += qpn - dev->phys_caps.base_tunnel_sqpn;
773 qk += qpn - dev->phys_caps.base_proxy_sqpn;
779 void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val)
781 struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev);
783 if (!mlx4_is_master(dev))
790 void mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid)
792 struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev);
794 if (!mlx4_is_master(dev))
801 __be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave)
803 struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev);
805 if (!mlx4_is_master(dev))
812 int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
814 struct mlx4_priv *priv = mlx4_priv(dev);
817 if (!mlx4_is_master(dev))
842 static void slave_adjust_steering_mode(struct mlx4_dev *dev,
846 dev->caps.steering_mode = hca_param->steering_mode;
847 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
848 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
849 dev->caps.fs_log_max_ucast_qp_range_size =
852 dev->caps.num_qp_per_mgm =
855 mlx4_dbg(dev, "Steering mode is: %s\n",
856 mlx4_steering_mode_str(dev->caps.steering_mode));
859 static void mlx4_slave_destroy_special_qp_cap(struct mlx4_dev *dev)
861 kfree(dev->caps.spec_qps);
862 dev->caps.spec_qps = NULL;
865 static int mlx4_slave_special_qp_cap(struct mlx4_dev *dev)
868 struct mlx4_caps *caps = &dev->caps;
875 mlx4_err(dev, "Failed to allocate memory for special qps cap\n");
881 err = mlx4_QUERY_FUNC_CAP(dev, i, func_cap);
883 mlx4_err(dev, "QUERY_FUNC_CAP port command failed for port %d, aborting (%d)\n",
890 err = mlx4_get_slave_pkey_gid_tbl_len(dev, i,
894 mlx4_err(dev, "QUERY_PORT command failed for port %d, aborting (%d)\n",
902 mlx4_slave_destroy_special_qp_cap(dev);
907 static int mlx4_slave_cap(struct mlx4_dev *dev)
919 mlx4_err(dev, "Failed to allocate memory for slave_cap\n");
924 err = mlx4_QUERY_HCA(dev, hca_param);
926 mlx4_err(dev, "QUERY_HCA command failed, aborting\n");
934 mlx4_err(dev, "Unknown hca global capabilities\n");
939 dev->caps.hca_core_clock = hca_param->hca_core_clock;
941 dev->caps.max_qp_dest_rdma = 1 << hca_param->log_rd_per_qp;
942 err = mlx4_dev_cap(dev, dev_cap);
944 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting\n");
948 err = mlx4_QUERY_FW(dev);
950 mlx4_err(dev, "QUERY_FW command failed: could not get FW version\n");
952 page_size = ~dev->caps.page_size_cap + 1;
953 mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
955 mlx4_err(dev, "HCA minimum page size of %d bigger than kernel PAGE_SIZE of %ld, aborting\n",
962 dev->uar_page_shift = hca_param->uar_page_sz + 12;
965 if (dev->uar_page_shift > PAGE_SHIFT) {
966 mlx4_err(dev,
973 mlx4_set_num_reserved_uars(dev, dev_cap);
979 dev->caps.uar_page_size = PAGE_SIZE;
981 err = mlx4_QUERY_FUNC_CAP(dev, 0, func_cap);
983 mlx4_err(dev, "QUERY_FUNC_CAP general command failed, aborting (%d)\n",
990 mlx4_err(dev, "Unknown pf context behaviour %x known flags %x\n",
997 dev->caps.num_ports = func_cap->num_ports;
998 dev->quotas.qp = func_cap->qp_quota;
999 dev->quotas.srq = func_cap->srq_quota;
1000 dev->quotas.cq = func_cap->cq_quota;
1001 dev->quotas.mpt = func_cap->mpt_quota;
1002 dev->quotas.mtt = func_cap->mtt_quota;
1003 dev->caps.num_qps = 1 << hca_param->log_num_qps;
1004 dev->caps.num_srqs = 1 << hca_param->log_num_srqs;
1005 dev->caps.num_cqs = 1 << hca_param->log_num_cqs;
1006 dev->caps.num_mpts = 1 << hca_param->log_mpt_sz;
1007 dev->caps.num_eqs = func_cap->max_eq;
1008 dev->caps.reserved_eqs = func_cap->reserved_eq;
1009 dev->caps.reserved_lkey = func_cap->reserved_lkey;
1010 dev->caps.num_pds = MLX4_NUM_PDS;
1011 dev->caps.num_mgms = 0;
1012 dev->caps.num_amgms = 0;
1014 if (dev->caps.num_ports > MLX4_MAX_PORTS) {
1015 mlx4_err(dev, "HCA has %d ports, but we only support %d, aborting\n",
1016 dev->caps.num_ports, MLX4_MAX_PORTS);
1021 mlx4_replace_zero_macs(dev);
1023 err = mlx4_slave_special_qp_cap(dev);
1025 mlx4_err(dev, "Set special QP caps failed. aborting\n");
1029 if (dev->caps.uar_page_size * (dev->caps.num_uars -
1030 dev->caps.reserved_uars) >
1031 pci_resource_len(dev->persist->pdev,
1033 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than PCI resource 2 size of 0x%llx, aborting\n",
1034 dev->caps.uar_page_size * dev->caps.num_uars,
1036 pci_resource_len(dev->persist->pdev, 2));
1042 dev->caps.eqe_size = 64;
1043 dev->caps.eqe_factor = 1;
1045 dev->caps.eqe_size = 32;
1046 dev->caps.eqe_factor = 0;
1050 dev->caps.cqe_size = 64;
1051 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE;
1053 dev->caps.cqe_size = 32;
1057 dev->caps.eqe_size = hca_param->eqe_size;
1058 dev->caps.eqe_factor = 0;
1062 dev->caps.cqe_size = hca_param->cqe_size;
1064 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE;
1067 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS;
1068 mlx4_warn(dev, "Timestamping is not supported in slave mode\n");
1070 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_USER_MAC_EN;
1071 mlx4_dbg(dev, "User MAC FW update is not supported in slave mode\n");
1073 slave_adjust_steering_mode(dev, dev_cap, hca_param);
1074 mlx4_dbg(dev, "RSS support for IP fragments is %s\n",
1078 dev->caps.bf_reg_size)
1079 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_ETH_BF_QP;
1082 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_A0_QP;
1086 mlx4_slave_destroy_special_qp_cap(dev);
1094 static void mlx4_request_modules(struct mlx4_dev *dev)
1102 for (port = 1; port <= dev->caps.num_ports; port++) {
1103 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_IB)
1105 else if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
1111 if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE))
1119 int mlx4_change_port_types(struct mlx4_dev *dev,
1126 for (port = 0; port < dev->caps.num_ports; port++) {
1129 if (port_types[port] != dev->caps.port_type[port + 1])
1133 mlx4_unregister_device(dev);
1134 for (port = 1; port <= dev->caps.num_ports; port++) {
1135 mlx4_CLOSE_PORT(dev, port);
1136 dev->caps.port_type[port] = port_types[port - 1];
1137 err = mlx4_SET_PORT(dev, port, -1);
1139 mlx4_err(dev, "Failed to set port %d, aborting\n",
1144 mlx4_set_port_mask(dev);
1145 err = mlx4_register_device(dev);
1147 mlx4_err(dev, "Failed to register device\n");
1150 mlx4_request_modules(dev);
1157 static ssize_t show_port_type(struct device *dev,
1163 struct mlx4_dev *mdev = info->dev;
1180 struct mlx4_dev *mdev = info->dev;
1243 static ssize_t set_port_type(struct device *dev,
1249 struct mlx4_dev *mdev = info->dev;
1308 static ssize_t show_port_ib_mtu(struct device *dev,
1314 struct mlx4_dev *mdev = info->dev;
1324 static ssize_t set_port_ib_mtu(struct device *dev,
1330 struct mlx4_dev *mdev = info->dev;
1371 static int mlx4_mf_bond(struct mlx4_dev *dev)
1379 slaves_port1 = mlx4_phys_to_slaves_pport(dev, 1);
1380 slaves_port2 = mlx4_phys_to_slaves_pport(dev, 2);
1383 dev->persist->num_vfs + 1);
1386 if (bitmap_weight(slaves_port_1_2, dev->persist->num_vfs + 1) > 1) {
1387 mlx4_warn(dev, "HA mode unsupported for dual ported VFs\n");
1394 nvfs = bitmap_weight(slaves_port1.slaves, dev->persist->num_vfs + 1) +
1395 bitmap_weight(slaves_port2.slaves, dev->persist->num_vfs + 1) - 2;
1399 mlx4_warn(dev, "HA mode is not supported for %d VFs (max %d are allowed)\n",
1404 if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) {
1405 mlx4_warn(dev, "HA mode unsupported for NON DMFS steering\n");
1409 err = mlx4_bond_mac_table(dev);
1412 err = mlx4_bond_vlan_table(dev);
1415 err = mlx4_bond_fs_rules(dev);
1421 (void)mlx4_unbond_vlan_table(dev);
1423 (void)mlx4_unbond_mac_table(dev);
1427 static int mlx4_mf_unbond(struct mlx4_dev *dev)
1431 ret = mlx4_unbond_fs_rules(dev);
1433 mlx4_warn(dev, "multifunction unbond for flow rules failed (%d)\n", ret);
1434 ret1 = mlx4_unbond_mac_table(dev);
1436 mlx4_warn(dev, "multifunction unbond for MAC table failed (%d)\n", ret1);
1439 ret1 = mlx4_unbond_vlan_table(dev);
1441 mlx4_warn(dev, "multifunction unbond for VLAN table failed (%d)\n", ret1);
1447 int mlx4_bond(struct mlx4_dev *dev)
1450 struct mlx4_priv *priv = mlx4_priv(dev);
1454 if (!mlx4_is_bonded(dev)) {
1455 ret = mlx4_do_bond(dev, true);
1457 mlx4_err(dev, "Failed to bond device: %d\n", ret);
1458 if (!ret && mlx4_is_master(dev)) {
1459 ret = mlx4_mf_bond(dev);
1461 mlx4_err(dev, "bond for multifunction failed\n");
1462 mlx4_do_bond(dev, false);
1469 mlx4_dbg(dev, "Device is bonded\n");
1475 int mlx4_unbond(struct mlx4_dev *dev)
1478 struct mlx4_priv *priv = mlx4_priv(dev);
1482 if (mlx4_is_bonded(dev)) {
1485 ret = mlx4_do_bond(dev, false);
1487 mlx4_err(dev, "Failed to unbond device: %d\n", ret);
1488 if (mlx4_is_master(dev))
1489 ret2 = mlx4_mf_unbond(dev);
1491 mlx4_warn(dev, "Failed to unbond device for multifunction (%d)\n", ret2);
1498 mlx4_dbg(dev, "Device is unbonded\n");
1505 int mlx4_port_map_set(struct mlx4_dev *dev, struct mlx4_port_map *v2p)
1509 struct mlx4_priv *priv = mlx4_priv(dev);
1512 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP))
1533 err = mlx4_virt2phy_port_map(dev, port1, port2);
1535 mlx4_dbg(dev, "port map changed: [%d][%d]\n",
1540 mlx4_err(dev, "Failed to change port mape: %d\n", err);
1549 static int mlx4_load_fw(struct mlx4_dev *dev)
1551 struct mlx4_priv *priv = mlx4_priv(dev);
1554 priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
1557 mlx4_err(dev, "Couldn't allocate FW area, aborting\n");
1561 err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
1563 mlx4_err(dev, "MAP_FA command failed, aborting\n");
1567 err = mlx4_RUN_FW(dev);
1569 mlx4_err(dev, "RUN_FW command failed, aborting\n");
1576 mlx4_UNMAP_FA(dev);
1579 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1583 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
1586 struct mlx4_priv *priv = mlx4_priv(dev);
1590 err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
1594 cmpt_entry_sz, dev->caps.num_qps,
1595 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1600 err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
1604 cmpt_entry_sz, dev->caps.num_srqs,
1605 dev->caps.reserved_srqs, 0, 0);
1609 err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
1613 cmpt_entry_sz, dev->caps.num_cqs,
1614 dev->caps.reserved_cqs, 0, 0);
1618 num_eqs = dev->phys_caps.num_phys_eqs;
1619 err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
1630 mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1633 mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1636 mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1642 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
1645 struct mlx4_priv *priv = mlx4_priv(dev);
1650 err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
1652 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting\n");
1656 mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory\n",
1660 priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
1663 mlx4_err(dev, "Couldn't allocate aux memory, aborting\n");
1667 err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
1669 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting\n");
1673 err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
1675 mlx4_err(dev, "Failed to map cMPT context memory, aborting\n");
1680 num_eqs = dev->phys_caps.num_phys_eqs;
1681 err = mlx4_init_icm_table(dev, &priv->eq_table.table,
1685 mlx4_err(dev, "Failed to map EQ context memory, aborting\n");
1693 * dev->caps.mtt_entry_sz below is really the MTT segment
1696 dev->caps.reserved_mtts =
1697 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
1698 dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
1700 err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
1702 dev->caps.mtt_entry_sz,
1703 dev->caps.num_mtts,
1704 dev->caps.reserved_mtts, 1, 0);
1706 mlx4_err(dev, "Failed to map MTT context memory, aborting\n");
1710 err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
1713 dev->caps.num_mpts,
1714 dev->caps.reserved_mrws, 1, 1);
1716 mlx4_err(dev, "Failed to map dMPT context memory, aborting\n");
1720 err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
1723 dev->caps.num_qps,
1724 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1727 mlx4_err(dev, "Failed to map QP context memory, aborting\n");
1731 err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
1734 dev->caps.num_qps,
1735 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1738 mlx4_err(dev, "Failed to map AUXC context memory, aborting\n");
1742 err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
1745 dev->caps.num_qps,
1746 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1749 mlx4_err(dev, "Failed to map ALTC context memory, aborting\n");
1753 err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
1756 dev->caps.num_qps,
1757 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
1760 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
1764 err = mlx4_init_icm_table(dev, &priv->cq_table.table,
1767 dev->caps.num_cqs,
1768 dev->caps.reserved_cqs, 0, 0);
1770 mlx4_err(dev, "Failed to map CQ context memory, aborting\n");
1774 err = mlx4_init_icm_table(dev, &priv->srq_table.table,
1777 dev->caps.num_srqs,
1778 dev->caps.reserved_srqs, 0, 0);
1780 mlx4_err(dev, "Failed to map SRQ context memory, aborting\n");
1791 err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
1793 mlx4_get_mgm_entry_size(dev),
1794 dev->caps.num_mgms + dev->caps.num_amgms,
1795 dev->caps.num_mgms + dev->caps.num_amgms,
1798 mlx4_err(dev, "Failed to map MCG context memory, aborting\n");
1805 mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1808 mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1811 mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1814 mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1817 mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1820 mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1823 mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1826 mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1829 mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1832 mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1833 mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1834 mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1835 mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1838 mlx4_UNMAP_ICM_AUX(dev);
1841 mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1846 static void mlx4_free_icms(struct mlx4_dev *dev)
1848 struct mlx4_priv *priv = mlx4_priv(dev);
1850 mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
1851 mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1852 mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1853 mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1854 mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1855 mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1856 mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1857 mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1858 mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1859 mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1860 mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1861 mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1862 mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1863 mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1865 mlx4_UNMAP_ICM_AUX(dev);
1866 mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1869 static void mlx4_slave_exit(struct mlx4_dev *dev)
1871 struct mlx4_priv *priv = mlx4_priv(dev);
1874 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_CMD_NA_OP,
1876 mlx4_warn(dev, "Failed to close slave function\n");
1880 static int map_bf_area(struct mlx4_dev *dev)
1882 struct mlx4_priv *priv = mlx4_priv(dev);
1887 if (!dev->caps.bf_reg_size)
1890 bf_start = pci_resource_start(dev->persist->pdev, 2) +
1891 (dev->caps.num_uars << PAGE_SHIFT);
1892 bf_len = pci_resource_len(dev->persist->pdev, 2) -
1893 (dev->caps.num_uars << PAGE_SHIFT);
1901 static void unmap_bf_area(struct mlx4_dev *dev)
1903 if (mlx4_priv(dev)->bf_mapping)
1904 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1907 u64 mlx4_read_clock(struct mlx4_dev *dev)
1912 struct mlx4_priv *priv = mlx4_priv(dev);
1929 static int map_internal_clock(struct mlx4_dev *dev)
1931 struct mlx4_priv *priv = mlx4_priv(dev);
1934 ioremap(pci_resource_start(dev->persist->pdev,
1944 int mlx4_get_internal_clock_params(struct mlx4_dev *dev,
1947 struct mlx4_priv *priv = mlx4_priv(dev);
1949 if (mlx4_is_slave(dev))
1952 if (!dev->caps.map_clock_to_user) {
1953 mlx4_dbg(dev, "Map clock to user is not supported.\n");
1968 static void unmap_internal_clock(struct mlx4_dev *dev)
1970 struct mlx4_priv *priv = mlx4_priv(dev);
1976 static void mlx4_close_hca(struct mlx4_dev *dev)
1978 unmap_internal_clock(dev);
1979 unmap_bf_area(dev);
1980 if (mlx4_is_slave(dev))
1981 mlx4_slave_exit(dev);
1983 mlx4_CLOSE_HCA(dev, 0);
1984 mlx4_free_icms(dev);
1988 static void mlx4_close_fw(struct mlx4_dev *dev)
1990 if (!mlx4_is_slave(dev)) {
1991 mlx4_UNMAP_FA(dev);
1992 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
1996 static int mlx4_comm_check_offline(struct mlx4_dev *dev)
2003 struct mlx4_priv *priv = mlx4_priv(dev);
2017 if (dev->persist->interface_state &
2028 mlx4_err(dev, "Communication channel is offline.\n");
2032 static void mlx4_reset_vf_support(struct mlx4_dev *dev)
2036 struct mlx4_priv *priv = mlx4_priv(dev);
2045 dev->caps.vf_caps |= MLX4_VF_CAP_FLAG_RESET;
2048 static int mlx4_init_slave(struct mlx4_dev *dev)
2050 struct mlx4_priv *priv = mlx4_priv(dev);
2057 mlx4_warn(dev, "PF is not ready - Deferring probe\n");
2063 if (mlx4_comm_check_offline(dev)) {
2064 mlx4_err(dev, "PF is not responsive, skipping initialization\n");
2068 mlx4_reset_vf_support(dev);
2069 mlx4_warn(dev, "Sending reset\n");
2070 ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
2076 mlx4_warn(dev, "slave is currently in the middle of FLR - Deferring probe\n");
2090 mlx4_err(dev, "slave driver version is not supported by the master\n");
2094 mlx4_warn(dev, "Sending vhcr0\n");
2095 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
2098 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
2101 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
2104 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma,
2112 mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_CMD_NA_OP, 0);
2118 static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
2122 for (i = 1; i <= dev->caps.num_ports; i++) {
2123 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
2124 dev->caps.gid_table_len[i] =
2125 mlx4_get_slave_num_gids(dev, 0, i);
2127 dev->caps.gid_table_len[i] = 1;
2128 dev->caps.pkey_table_len[i] =
2129 dev->phys_caps.pkey_phys_table_len[i] - 1;
2171 static void choose_steering_mode(struct mlx4_dev *dev,
2176 if (dev->caps.dmfs_high_steer_mode ==
2178 mlx4_err(dev, "DMFS high rate mode not supported\n");
2180 dev->caps.dmfs_high_steer_mode =
2187 (!mlx4_is_mfunc(dev) ||
2189 (dev->persist->num_vfs + 1))) &&
2192 dev->oper_log_mgm_entry_size =
2194 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
2195 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
2196 dev->caps.fs_log_max_ucast_qp_range_size =
2199 if (dev->caps.dmfs_high_steer_mode !=
2201 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DISABLE;
2202 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
2203 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
2204 dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
2206 dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
2208 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
2209 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
2210 mlx4_warn(dev, "Must have both UC_STEER and MC_STEER flags set to use B0 steering - falling back to A0 steering mode\n");
2212 dev->oper_log_mgm_entry_size =
2216 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
2218 mlx4_dbg(dev, "Steering mode is: %s, oper_log_mgm_entry_size = %d, modparam log_num_mgm_entry_size = %d\n",
2219 mlx4_steering_mode_str(dev->caps.steering_mode),
2220 dev->oper_log_mgm_entry_size,
2224 static void choose_tunnel_offload_mode(struct mlx4_dev *dev,
2227 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2229 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_VXLAN;
2231 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_NONE;
2233 mlx4_dbg(dev, "Tunneling offload mode is: %s\n", (dev->caps.tunnel_offload_mode
2237 static int mlx4_validate_optimized_steering(struct mlx4_dev *dev)
2242 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_NOT_SUPPORTED)
2245 for (i = 1; i <= dev->caps.num_ports; i++) {
2246 if (mlx4_dev_port(dev, i, &port_cap)) {
2247 mlx4_err(dev,
2249 } else if ((dev->caps.dmfs_high_steer_mode !=
2252 !!(dev->caps.dmfs_high_steer_mode ==
2254 mlx4_err(dev,
2257 dev->caps.dmfs_high_steer_mode),
2266 static int mlx4_init_fw(struct mlx4_dev *dev)
2271 if (!mlx4_is_slave(dev)) {
2272 err = mlx4_QUERY_FW(dev);
2275 mlx4_info(dev, "non-primary physical function, skipping\n");
2277 mlx4_err(dev, "QUERY_FW command failed, aborting\n");
2281 err = mlx4_load_fw(dev);
2283 mlx4_err(dev, "Failed to start FW, aborting\n");
2289 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
2291 mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
2297 static int mlx4_init_hca(struct mlx4_dev *dev)
2299 struct mlx4_priv *priv = mlx4_priv(dev);
2308 if (!mlx4_is_slave(dev)) {
2317 err = mlx4_dev_cap(dev, dev_cap);
2319 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting\n");
2323 choose_steering_mode(dev, dev_cap);
2324 choose_tunnel_offload_mode(dev, dev_cap);
2326 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC &&
2327 mlx4_is_master(dev))
2328 dev->caps.function_caps |= MLX4_FUNC_CAP_DMFS_A0_STATIC;
2330 err = mlx4_get_phys_port_id(dev);
2332 mlx4_err(dev, "Fail to get physical port id\n");
2334 if (mlx4_is_master(dev))
2335 mlx4_parav_master_pf_caps(dev);
2338 mlx4_info(dev, "Running from within kdump kernel. Using low memory profile\n");
2343 if (dev->caps.steering_mode ==
2347 icm_size = mlx4_make_profile(dev, &profile, dev_cap,
2354 if (enable_4k_uar || !dev->persist->num_vfs) {
2355 init_hca->log_uar_sz = ilog2(dev->caps.num_uars) +
2359 init_hca->log_uar_sz = ilog2(dev->caps.num_uars);
2364 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2365 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN)
2368 err = mlx4_init_icm(dev, dev_cap, init_hca, icm_size);
2372 err = mlx4_INIT_HCA(dev, init_hca);
2374 mlx4_err(dev, "INIT_HCA command failed, aborting\n");
2379 err = mlx4_query_func(dev, dev_cap);
2381 mlx4_err(dev, "QUERY_FUNC command failed, aborting.\n");
2384 dev->caps.num_eqs = dev_cap->max_eqs;
2385 dev->caps.reserved_eqs = dev_cap->reserved_eqs;
2386 dev->caps.reserved_uars = dev_cap->reserved_uars;
2394 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
2395 err = mlx4_QUERY_HCA(dev, init_hca);
2397 mlx4_err(dev, "QUERY_HCA command failed, disable timestamp\n");
2398 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS;
2400 dev->caps.hca_core_clock =
2407 if (!dev->caps.hca_core_clock) {
2408 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS;
2409 mlx4_err(dev,
2411 } else if (map_internal_clock(dev)) {
2416 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS;
2417 mlx4_err(dev, "Failed to map internal clock. Timestamping is not supported\n");
2421 if (dev->caps.dmfs_high_steer_mode !=
2423 if (mlx4_validate_optimized_steering(dev))
2424 mlx4_warn(dev, "Optimized steering validation failed\n");
2426 if (dev->caps.dmfs_high_steer_mode ==
2428 dev->caps.dmfs_high_rate_qpn_base =
2429 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW];
2430 dev->caps.dmfs_high_rate_qpn_range =
2434 mlx4_info(dev, "DMFS high rate steer mode is: %s\n",
2436 dev->caps.dmfs_high_steer_mode));
2439 err = mlx4_init_slave(dev);
2442 mlx4_err(dev, "Failed to initialize slave\n");
2446 err = mlx4_slave_cap(dev);
2448 mlx4_err(dev, "Failed to obtain slave caps\n");
2453 if (map_bf_area(dev))
2454 mlx4_dbg(dev, "Failed to map blue flame area\n");
2457 if (!mlx4_is_slave(dev))
2458 mlx4_set_port_mask(dev);
2460 err = mlx4_QUERY_ADAPTER(dev, &adapter);
2462 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting\n");
2467 err = mlx4_config_dev_retrieval(dev, ¶ms);
2469 mlx4_err(dev, "Failed to query CONFIG_DEV parameters\n");
2471 dev->caps.rx_checksum_flags_port[1] = params.rx_csum_flags_port_1;
2472 dev->caps.rx_checksum_flags_port[2] = params.rx_csum_flags_port_2;
2475 memcpy(dev->board_id, adapter.board_id, sizeof(dev->board_id));
2481 unmap_internal_clock(dev);
2482 unmap_bf_area(dev);
2484 if (mlx4_is_slave(dev))
2485 mlx4_slave_destroy_special_qp_cap(dev);
2488 if (mlx4_is_slave(dev))
2489 mlx4_slave_exit(dev);
2491 mlx4_CLOSE_HCA(dev, 0);
2494 if (!mlx4_is_slave(dev))
2495 mlx4_free_icms(dev);
2504 static int mlx4_init_counters_table(struct mlx4_dev *dev)
2506 struct mlx4_priv *priv = mlx4_priv(dev);
2509 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
2512 if (!dev->caps.max_counters)
2515 nent_pow2 = roundup_pow_of_two(dev->caps.max_counters);
2519 nent_pow2 - dev->caps.max_counters + 1);
2522 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
2524 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
2527 if (!dev->caps.max_counters)
2530 mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
2533 static void mlx4_cleanup_default_counters(struct mlx4_dev *dev)
2535 struct mlx4_priv *priv = mlx4_priv(dev);
2538 for (port = 0; port < dev->caps.num_ports; port++)
2540 mlx4_counter_free(dev, priv->def_counter[port]);
2543 static int mlx4_allocate_default_counters(struct mlx4_dev *dev)
2545 struct mlx4_priv *priv = mlx4_priv(dev);
2549 for (port = 0; port < dev->caps.num_ports; port++)
2552 for (port = 0; port < dev->caps.num_ports; port++) {
2553 err = mlx4_counter_alloc(dev, &idx, MLX4_RES_USAGE_DRIVER);
2561 } else if (mlx4_is_slave(dev) && err == -EINVAL) {
2562 priv->def_counter[port] = MLX4_SINK_COUNTER_INDEX(dev);
2563 mlx4_warn(dev, "can't allocate counter from old PF driver, using index %d\n",
2564 MLX4_SINK_COUNTER_INDEX(dev));
2567 mlx4_err(dev, "%s: failed to allocate default counter port %d err %d\n",
2569 mlx4_cleanup_default_counters(dev);
2573 mlx4_dbg(dev, "%s: default counter index %d for port %d\n",
2580 int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
2582 struct mlx4_priv *priv = mlx4_priv(dev);
2584 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
2589 *idx = MLX4_SINK_COUNTER_INDEX(dev);
2596 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx, u8 usage)
2602 if (mlx4_is_mfunc(dev)) {
2603 err = mlx4_cmd_imm(dev, 0, &out_param, in_modifier,
2612 return __mlx4_counter_alloc(dev, idx);
2616 static int __mlx4_clear_if_stat(struct mlx4_dev *dev,
2623 if_stat_mailbox = mlx4_alloc_cmd_mailbox(dev);
2627 err = mlx4_cmd_box(dev, 0, if_stat_mailbox->dma, if_stat_in_mod, 0,
2631 mlx4_free_cmd_mailbox(dev, if_stat_mailbox);
2635 void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
2637 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
2640 if (idx == MLX4_SINK_COUNTER_INDEX(dev))
2643 __mlx4_clear_if_stat(dev, idx);
2645 mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx, MLX4_USE_RR);
2649 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
2653 if (mlx4_is_mfunc(dev)) {
2655 mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE,
2660 __mlx4_counter_free(dev, idx);
2664 int mlx4_get_default_counter_index(struct mlx4_dev *dev, int port)
2666 struct mlx4_priv *priv = mlx4_priv(dev);
2672 void mlx4_set_admin_guid(struct mlx4_dev *dev, __be64 guid, int entry, int port)
2674 struct mlx4_priv *priv = mlx4_priv(dev);
2680 __be64 mlx4_get_admin_guid(struct mlx4_dev *dev, int entry, int port)
2682 struct mlx4_priv *priv = mlx4_priv(dev);
2688 void mlx4_set_random_admin_guid(struct mlx4_dev *dev, int entry, int port)
2690 struct mlx4_priv *priv = mlx4_priv(dev);
2703 static int mlx4_setup_hca(struct mlx4_dev *dev)
2705 struct mlx4_priv *priv = mlx4_priv(dev);
2710 err = mlx4_init_uar_table(dev);
2712 mlx4_err(dev, "Failed to initialize user access region table, aborting\n");
2716 err = mlx4_uar_alloc(dev, &priv->driver_uar);
2718 mlx4_err(dev, "Failed to allocate driver access region, aborting\n");
2724 mlx4_err(dev, "Couldn't map kernel access region, aborting\n");
2729 err = mlx4_init_pd_table(dev);
2731 mlx4_err(dev, "Failed to initialize protection domain table, aborting\n");
2735 err = mlx4_init_xrcd_table(dev);
2737 mlx4_err(dev, "Failed to initialize reliable connection domain table, aborting\n");
2741 err = mlx4_init_mr_table(dev);
2743 mlx4_err(dev, "Failed to initialize memory region table, aborting\n");
2747 if (!mlx4_is_slave(dev)) {
2748 err = mlx4_init_mcg_table(dev);
2750 mlx4_err(dev, "Failed to initialize multicast group table, aborting\n");
2753 err = mlx4_config_mad_demux(dev);
2755 mlx4_err(dev, "Failed in config_mad_demux, aborting\n");
2760 err = mlx4_init_eq_table(dev);
2762 mlx4_err(dev, "Failed to initialize event queue table, aborting\n");
2766 err = mlx4_cmd_use_events(dev);
2768 mlx4_err(dev, "Failed to switch to event-driven firmware commands, aborting\n");
2772 err = mlx4_NOP(dev);
2774 if (dev->flags & MLX4_FLAG_MSI_X) {
2775 mlx4_warn(dev, "NOP command failed to generate MSI-X interrupt IRQ %d)\n",
2777 mlx4_warn(dev, "Trying again without MSI-X\n");
2779 mlx4_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting\n",
2781 mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
2787 mlx4_dbg(dev, "NOP command IRQ test passed\n");
2789 err = mlx4_init_cq_table(dev);
2791 mlx4_err(dev, "Failed to initialize completion queue table, aborting\n");
2795 err = mlx4_init_srq_table(dev);
2797 mlx4_err(dev, "Failed to initialize shared receive queue table, aborting\n");
2801 err = mlx4_init_qp_table(dev);
2803 mlx4_err(dev, "Failed to initialize queue pair table, aborting\n");
2807 if (!mlx4_is_slave(dev)) {
2808 err = mlx4_init_counters_table(dev);
2810 mlx4_err(dev, "Failed to initialize counters table, aborting\n");
2815 err = mlx4_allocate_default_counters(dev);
2817 mlx4_err(dev, "Failed to allocate default counters, aborting\n");
2821 if (!mlx4_is_slave(dev)) {
2822 for (port = 1; port <= dev->caps.num_ports; port++) {
2824 err = mlx4_get_port_ib_caps(dev, port,
2827 mlx4_warn(dev, "failed to get port %d default ib capabilities (%d). Continuing with caps = 0\n",
2829 dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
2832 if (mlx4_is_master(dev)) {
2834 for (i = 0; i < dev->num_slaves; i++) {
2835 if (i == mlx4_master_func_num(dev))
2842 if (mlx4_is_mfunc(dev))
2843 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
2845 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
2847 err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ?
2848 dev->caps.pkey_table_len[port] : -1);
2850 mlx4_err(dev, "Failed to set port %d, aborting\n",
2860 mlx4_cleanup_default_counters(dev);
2863 if (!mlx4_is_slave(dev))
2864 mlx4_cleanup_counters_table(dev);
2867 mlx4_cleanup_qp_table(dev);
2870 mlx4_cleanup_srq_table(dev);
2873 mlx4_cleanup_cq_table(dev);
2876 mlx4_cmd_use_polling(dev);
2879 mlx4_cleanup_eq_table(dev);
2882 if (!mlx4_is_slave(dev))
2883 mlx4_cleanup_mcg_table(dev);
2886 mlx4_cleanup_mr_table(dev);
2889 mlx4_cleanup_xrcd_table(dev);
2892 mlx4_cleanup_pd_table(dev);
2898 mlx4_uar_free(dev, &priv->driver_uar);
2901 mlx4_cleanup_uar_table(dev);
2905 static int mlx4_init_affinity_hint(struct mlx4_dev *dev, int port, int eqn)
2908 struct mlx4_priv *priv = mlx4_priv(dev);
2913 if (eqn > dev->caps.num_comp_vectors)
2917 off += mlx4_get_eqs_per_port(dev, i);
2935 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
2937 struct mlx4_priv *priv = mlx4_priv(dev);
2943 int nreq = min3(dev->caps.num_ports *
2945 dev->caps.num_eqs - dev->caps.reserved_eqs,
2958 nreq = pci_enable_msix_range(dev->persist->pdev, entries, 2,
2966 dev->caps.num_comp_vectors = nreq - 1;
2970 dev->caps.num_ports);
2972 for (i = 0; i < dev->caps.num_comp_vectors + 1; i++) {
2979 if (MLX4_IS_LEGACY_EQ_MODE(dev->caps)) {
2981 dev->caps.num_ports);
2988 if (mlx4_init_affinity_hint(dev, port + 1, i))
2989 mlx4_warn(dev, "Couldn't init hint cpumask for EQ %d\n",
2993 * (dev->caps.num_comp_vectors / dev->caps.num_ports)
3001 if ((dev->caps.num_comp_vectors > dev->caps.num_ports) &&
3003 (dev->caps.num_comp_vectors / dev->caps.num_ports)) ==
3005 /* If dev->caps.num_comp_vectors < dev->caps.num_ports,
3011 dev->flags |= MLX4_FLAG_MSI_X;
3018 dev->caps.num_comp_vectors = 1;
3022 priv->eq_table.eq[i].irq = dev->persist->pdev->irq;
3025 dev->caps.num_ports);
3030 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
3032 struct devlink *devlink = priv_to_devlink(mlx4_priv(dev));
3033 struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
3045 dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
3048 dev->caps.port_type[port] == MLX4_PORT_TYPE_IB)
3051 info->dev = dev;
3053 if (!mlx4_is_slave(dev)) {
3054 mlx4_init_mac_table(dev, &info->mac_table);
3055 mlx4_init_vlan_table(dev, &info->vlan_table);
3056 mlx4_init_roce_gid_table(dev, &info->gid_table);
3057 info->base_qpn = mlx4_get_base_qpn(dev, port);
3062 if (mlx4_is_mfunc(dev)) {
3071 err = device_create_file(&dev->persist->pdev->dev, &info->port_attr);
3073 mlx4_err(dev, "Failed to create file for port %d\n", port);
3081 if (mlx4_is_mfunc(dev)) {
3090 err = device_create_file(&dev->persist->pdev->dev,
3093 mlx4_err(dev, "Failed to create mtu file for port %d\n", port);
3094 device_remove_file(&info->dev->persist->pdev->dev,
3109 device_remove_file(&info->dev->persist->pdev->dev, &info->port_attr);
3110 device_remove_file(&info->dev->persist->pdev->dev,
3120 static int mlx4_init_steering(struct mlx4_dev *dev)
3122 struct mlx4_priv *priv = mlx4_priv(dev);
3123 int num_entries = dev->caps.num_ports;
3139 static void mlx4_clear_steering(struct mlx4_dev *dev)
3141 struct mlx4_priv *priv = mlx4_priv(dev);
3144 int num_entries = dev->caps.num_ports;
3180 static int mlx4_get_ownership(struct mlx4_dev *dev)
3185 if (pci_channel_offline(dev->persist->pdev))
3188 owner = ioremap(pci_resource_start(dev->persist->pdev, 0) +
3192 mlx4_err(dev, "Failed to obtain ownership bit\n");
3201 static void mlx4_free_ownership(struct mlx4_dev *dev)
3205 if (pci_channel_offline(dev->persist->pdev))
3208 owner = ioremap(pci_resource_start(dev->persist->pdev, 0) +
3212 mlx4_err(dev, "Failed to obtain ownership bit\n");
3223 static u64 mlx4_enable_sriov(struct mlx4_dev *dev, struct pci_dev *pdev,
3226 u64 dev_flags = dev->flags;
3232 dev->dev_vfs = kcalloc(total_vfs, sizeof(*dev->dev_vfs),
3234 if (!dev->dev_vfs)
3240 if (dev->flags & MLX4_FLAG_SRIOV) {
3242 mlx4_err(dev, "SR-IOV was already enabled, but with num_vfs (%d) different than requested (%d)\n",
3248 dev->dev_vfs = kcalloc(total_vfs, sizeof(*dev->dev_vfs), GFP_KERNEL);
3249 if (NULL == dev->dev_vfs) {
3250 mlx4_err(dev, "Failed to allocate memory for VFs\n");
3254 if (!(dev->flags & MLX4_FLAG_SRIOV)) {
3256 mlx4_err(dev, "requested vfs (%d) > available vfs (%d). Continuing without SR_IOV\n",
3261 mlx4_warn(dev, "Enabling SR-IOV with %d VFs\n", total_vfs);
3265 mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d)\n",
3269 mlx4_warn(dev, "Running in master mode\n");
3273 dev->persist->num_vfs = total_vfs;
3280 dev->persist->num_vfs = 0;
3281 kfree(dev->dev_vfs);
3282 dev->dev_vfs = NULL;
3290 static int mlx4_check_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
3297 mlx4_err(dev, "Requested %d VFs, but FW does not support more than 64\n",
3304 static int mlx4_pci_enable_device(struct mlx4_dev *dev)
3306 struct pci_dev *pdev = dev->persist->pdev;
3309 mutex_lock(&dev->persist->pci_status_mutex);
3310 if (dev->persist->pci_status == MLX4_PCI_STATUS_DISABLED) {
3313 dev->persist->pci_status = MLX4_PCI_STATUS_ENABLED;
3315 mutex_unlock(&dev->persist->pci_status_mutex);
3320 static void mlx4_pci_disable_device(struct mlx4_dev *dev)
3322 struct pci_dev *pdev = dev->persist->pdev;
3324 mutex_lock(&dev->persist->pci_status_mutex);
3325 if (dev->persist->pci_status == MLX4_PCI_STATUS_ENABLED) {
3327 dev->persist->pci_status = MLX4_PCI_STATUS_DISABLED;
3329 mutex_unlock(&dev->persist->pci_status_mutex);
3336 struct mlx4_dev *dev;
3344 dev = &priv->dev;
3359 dev->rev_id = pdev->revision;
3360 dev->numa_node = dev_to_node(&pdev->dev);
3364 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
3365 dev->flags |= MLX4_FLAG_SLAVE;
3370 err = mlx4_get_ownership(dev);
3375 mlx4_warn(dev, "Multiple PFs not yet supported - Skipping PF\n");
3388 err = mlx4_reset(dev);
3390 mlx4_err(dev, "Failed to reset HCA, aborting\n");
3395 dev->flags = MLX4_FLAG_MASTER;
3398 dev->flags |= MLX4_FLAG_SRIOV;
3399 dev->persist->num_vfs = total_vfs;
3406 dev->persist->state = MLX4_DEVICE_STATE_UP;
3409 err = mlx4_cmd_init(dev);
3411 mlx4_err(dev, "Failed to init command interface, aborting\n");
3418 if (mlx4_is_mfunc(dev)) {
3419 if (mlx4_is_master(dev)) {
3420 dev->num_slaves = MLX4_MAX_NUM_SLAVES;
3423 dev->num_slaves = 0;
3424 err = mlx4_multi_func_init(dev);
3426 mlx4_err(dev, "Failed to init slave mfunc interface, aborting\n");
3432 err = mlx4_init_fw(dev);
3434 mlx4_err(dev, "Failed to init fw, aborting.\n");
3438 if (mlx4_is_master(dev)) {
3448 err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
3450 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
3454 if (mlx4_check_dev_cap(dev, dev_cap, nvfs))
3458 u64 dev_flags = mlx4_enable_sriov(dev, pdev,
3463 mlx4_close_fw(dev);
3464 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL);
3465 dev->flags = dev_flags;
3466 if (!SRIOV_VALID_STATE(dev->flags)) {
3467 mlx4_err(dev, "Invalid SRIOV state\n");
3470 err = mlx4_reset(dev);
3472 mlx4_err(dev, "Failed to reset HCA, aborting.\n");
3483 err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
3485 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
3489 if (mlx4_check_dev_cap(dev, dev_cap, nvfs))
3494 err = mlx4_init_hca(dev);
3499 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL);
3501 if (dev->flags & MLX4_FLAG_SRIOV) {
3504 if (mlx4_is_master(dev) && !reset_flow)
3506 dev->flags &= ~MLX4_FLAG_SRIOV;
3508 if (!mlx4_is_slave(dev))
3509 mlx4_free_ownership(dev);
3510 dev->flags |= MLX4_FLAG_SLAVE;
3511 dev->flags &= ~MLX4_FLAG_MASTER;
3517 if (mlx4_is_master(dev) && (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS)) {
3518 u64 dev_flags = mlx4_enable_sriov(dev, pdev, total_vfs,
3521 if ((dev->flags ^ dev_flags) & (MLX4_FLAG_MASTER | MLX4_FLAG_SLAVE)) {
3522 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_VHCR);
3523 dev->flags = dev_flags;
3524 err = mlx4_cmd_init(dev);
3529 mlx4_err(dev, "Failed to init VHCR command interface, aborting\n");
3533 dev->flags = dev_flags;
3536 if (!SRIOV_VALID_STATE(dev->flags)) {
3537 mlx4_err(dev, "Invalid SRIOV state\n");
3547 if (!mlx4_is_slave(dev))
3548 pcie_print_link_status(dev->persist->pdev);
3552 if (mlx4_is_master(dev)) {
3553 if (dev->caps.num_ports < 2 &&
3556 mlx4_err(dev,
3558 dev->caps.num_ports);
3561 memcpy(dev->persist->nvfs, nvfs, sizeof(dev->persist->nvfs));
3564 i < sizeof(dev->persist->nvfs)/
3565 sizeof(dev->persist->nvfs[0]); i++) {
3568 for (j = 0; j < dev->persist->nvfs[i]; ++sum, ++j) {
3569 dev->dev_vfs[sum].min_port = i < 2 ? i + 1 : 1;
3570 dev->dev_vfs[sum].n_ports = i < 2 ? 1 :
3571 dev->caps.num_ports;
3578 err = mlx4_multi_func_init(dev);
3580 mlx4_err(dev, "Failed to init master mfunc interface, aborting.\n");
3585 err = mlx4_alloc_eq_table(dev);
3592 mlx4_enable_msi_x(dev);
3593 if ((mlx4_is_mfunc(dev)) &&
3594 !(dev->flags & MLX4_FLAG_MSI_X)) {
3596 mlx4_err(dev, "INTx is not supported in multi-function mode, aborting\n");
3600 if (!mlx4_is_slave(dev)) {
3601 err = mlx4_init_steering(dev);
3606 mlx4_init_quotas(dev);
3608 err = mlx4_setup_hca(dev);
3609 if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
3610 !mlx4_is_mfunc(dev)) {
3611 dev->flags &= ~MLX4_FLAG_MSI_X;
3612 dev->caps.num_comp_vectors = 1;
3614 err = mlx4_setup_hca(dev);
3623 if (mlx4_is_master(dev)) {
3624 err = mlx4_ARM_COMM_CHANNEL(dev);
3626 mlx4_err(dev, " Failed to arm comm channel eq: %x\n",
3632 for (port = 1; port <= dev->caps.num_ports; port++) {
3633 err = mlx4_init_port_info(dev, port);
3641 err = mlx4_register_device(dev);
3645 mlx4_request_modules(dev);
3647 mlx4_sense_init(dev);
3648 mlx4_start_sense(dev);
3652 if (mlx4_is_master(dev) && dev->persist->num_vfs && !reset_flow)
3662 mlx4_cleanup_default_counters(dev);
3663 if (!mlx4_is_slave(dev))
3664 mlx4_cleanup_counters_table(dev);
3665 mlx4_cleanup_qp_table(dev);
3666 mlx4_cleanup_srq_table(dev);
3667 mlx4_cleanup_cq_table(dev);
3668 mlx4_cmd_use_polling(dev);
3669 mlx4_cleanup_eq_table(dev);
3670 mlx4_cleanup_mcg_table(dev);
3671 mlx4_cleanup_mr_table(dev);
3672 mlx4_cleanup_xrcd_table(dev);
3673 mlx4_cleanup_pd_table(dev);
3674 mlx4_cleanup_uar_table(dev);
3677 if (!mlx4_is_slave(dev))
3678 mlx4_clear_steering(dev);
3681 if (dev->flags & MLX4_FLAG_MSI_X)
3685 mlx4_free_eq_table(dev);
3688 if (mlx4_is_master(dev)) {
3689 mlx4_free_resource_tracker(dev, RES_TR_FREE_STRUCTS_ONLY);
3690 mlx4_multi_func_cleanup(dev);
3693 if (mlx4_is_slave(dev))
3694 mlx4_slave_destroy_special_qp_cap(dev);
3697 mlx4_close_hca(dev);
3700 mlx4_close_fw(dev);
3703 if (mlx4_is_slave(dev))
3704 mlx4_multi_func_cleanup(dev);
3707 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL);
3710 if (dev->flags & MLX4_FLAG_SRIOV && !existing_vfs) {
3712 dev->flags &= ~MLX4_FLAG_SRIOV;
3715 if (mlx4_is_master(dev) && dev->persist->num_vfs && !reset_flow)
3718 kfree(priv->dev.dev_vfs);
3720 if (!mlx4_is_slave(dev))
3721 mlx4_free_ownership(dev);
3740 err = mlx4_pci_enable_device(&priv->dev);
3742 dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n");
3754 dev_err(&pdev->dev, "num_vfs module parameter cannot be negative\n");
3763 dev_err(&pdev->dev, "probe_vf module parameter cannot be negative or greater than num_vfs\n");
3769 dev_err(&pdev->dev,
3778 dev_err(&pdev->dev,
3790 dev_err(&pdev->dev, "Missing DCS, aborting (driver_data: 0x%x, pci_resource_flags(pdev, 0):0x%lx)\n",
3796 dev_err(&pdev->dev, "Missing UAR, aborting\n");
3803 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
3811 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask\n");
3814 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting\n");
3820 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit consistent PCI DMA mask\n");
3823 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, aborting\n");
3829 dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
3848 dev_warn(&pdev->dev, "Skipping virtual function:%d\n",
3856 err = mlx4_crdump_init(&priv->dev);
3860 err = mlx4_catas_init(&priv->dev);
3871 mlx4_catas_end(&priv->dev);
3874 mlx4_crdump_end(&priv->dev);
3880 mlx4_pci_disable_device(&priv->dev);
3912 struct mlx4_dev *dev = &priv->dev;
3913 struct mlx4_fw_crdump *crdump = &dev->persist->crdump;
3961 struct mlx4_dev *dev = &priv->dev;
3962 struct mlx4_dev_persistent *persist = dev->persist;
3969 mlx4_warn(persist->dev, "Reload performed on PF, will cause reset on operating Virtual Functions\n");
3979 struct mlx4_dev *dev = &priv->dev;
3980 struct mlx4_dev_persistent *persist = dev->persist;
3986 mlx4_err(persist->dev, "mlx4_restart_one_up failed, ret=%d\n",
4003 struct mlx4_dev *dev;
4013 dev = &priv->dev;
4014 dev->persist = kzalloc(sizeof(*dev->persist), GFP_KERNEL);
4015 if (!dev->persist) {
4019 dev->persist->pdev = pdev;
4020 dev->persist->dev = dev;
4021 pci_set_drvdata(pdev, dev->persist);
4023 mutex_init(&dev->persist->device_state_mutex);
4024 mutex_init(&dev->persist->interface_state_mutex);
4025 mutex_init(&dev->persist->pci_status_mutex);
4027 ret = devlink_register(devlink, &pdev->dev);
4050 kfree(dev->persist);
4056 static void mlx4_clean_dev(struct mlx4_dev *dev)
4058 struct mlx4_dev_persistent *persist = dev->persist;
4059 struct mlx4_priv *priv = mlx4_priv(dev);
4060 unsigned long flags = (dev->flags & RESET_PERSIST_MASK_FLAGS);
4063 priv->dev.persist = persist;
4064 priv->dev.flags = flags;
4070 struct mlx4_dev *dev = persist->dev;
4071 struct mlx4_priv *priv = mlx4_priv(dev);
4079 for (i = 0; i < dev->caps.num_ports; i++) {
4080 dev->persist->curr_port_type[i] = dev->caps.port_type[i + 1];
4081 dev->persist->curr_port_poss_type[i] = dev->caps.
4087 mlx4_stop_sense(dev);
4088 mlx4_unregister_device(dev);
4090 for (p = 1; p <= dev->caps.num_ports; p++) {
4092 mlx4_CLOSE_PORT(dev, p);
4095 if (mlx4_is_master(dev))
4096 mlx4_free_resource_tracker(dev,
4099 mlx4_cleanup_default_counters(dev);
4100 if (!mlx4_is_slave(dev))
4101 mlx4_cleanup_counters_table(dev);
4102 mlx4_cleanup_qp_table(dev);
4103 mlx4_cleanup_srq_table(dev);
4104 mlx4_cleanup_cq_table(dev);
4105 mlx4_cmd_use_polling(dev);
4106 mlx4_cleanup_eq_table(dev);
4107 mlx4_cleanup_mcg_table(dev);
4108 mlx4_cleanup_mr_table(dev);
4109 mlx4_cleanup_xrcd_table(dev);
4110 mlx4_cleanup_pd_table(dev);
4112 if (mlx4_is_master(dev))
4113 mlx4_free_resource_tracker(dev,
4117 mlx4_uar_free(dev, &priv->driver_uar);
4118 mlx4_cleanup_uar_table(dev);
4119 if (!mlx4_is_slave(dev))
4120 mlx4_clear_steering(dev);
4121 mlx4_free_eq_table(dev);
4122 if (mlx4_is_master(dev))
4123 mlx4_multi_func_cleanup(dev);
4124 mlx4_close_hca(dev);
4125 mlx4_close_fw(dev);
4126 if (mlx4_is_slave(dev))
4127 mlx4_multi_func_cleanup(dev);
4128 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL);
4130 if (dev->flags & MLX4_FLAG_MSI_X)
4133 if (!mlx4_is_slave(dev))
4134 mlx4_free_ownership(dev);
4136 mlx4_slave_destroy_special_qp_cap(dev);
4137 kfree(dev->dev_vfs);
4139 mlx4_clean_dev(dev);
4147 struct mlx4_dev *dev = persist->dev;
4148 struct mlx4_priv *priv = mlx4_priv(dev);
4154 if (mlx4_is_slave(dev))
4162 if (mlx4_is_master(dev) && dev->flags & MLX4_FLAG_SRIOV) {
4163 active_vfs = mlx4_how_many_lives_vf(dev);
4176 mlx4_info(dev, "%s: interface is down\n", __func__);
4177 mlx4_catas_end(dev);
4178 mlx4_crdump_end(dev);
4179 if (dev->flags & MLX4_FLAG_SRIOV && !active_vfs) {
4180 mlx4_warn(dev, "Disabling SR-IOV\n");
4185 mlx4_pci_disable_device(dev);
4189 kfree(dev->persist);
4193 static int restore_current_port_types(struct mlx4_dev *dev,
4197 struct mlx4_priv *priv = mlx4_priv(dev);
4200 mlx4_stop_sense(dev);
4203 for (i = 0; i < dev->caps.num_ports; i++)
4204 dev->caps.possible_type[i + 1] = poss_types[i];
4205 err = mlx4_change_port_types(dev, types);
4206 mlx4_start_sense(dev);
4221 struct mlx4_dev *dev = persist->dev;
4222 struct mlx4_priv *priv = mlx4_priv(dev);
4227 total_vfs = dev->persist->num_vfs;
4228 memcpy(nvfs, dev->persist->nvfs, sizeof(dev->persist->nvfs));
4234 mlx4_err(dev, "%s: ERROR: mlx4_load_one failed, pci_name=%s, err=%d\n",
4239 err = restore_current_port_types(dev, dev->persist->curr_port_type,
4240 dev->persist->curr_port_poss_type);
4242 mlx4_err(dev, "could not restore original port types (%d)\n",
4311 mlx4_err(persist->dev, "mlx4_pci_err_detected was called\n");
4322 mlx4_pci_disable_device(persist->dev);
4329 struct mlx4_dev *dev = persist->dev;
4332 mlx4_err(dev, "mlx4_pci_slot_reset was called\n");
4333 err = mlx4_pci_enable_device(dev);
4335 mlx4_err(dev, "Can not re-enable device, err=%d\n", err);
4348 struct mlx4_dev *dev = persist->dev;
4349 struct mlx4_priv *priv = mlx4_priv(dev);
4354 mlx4_err(dev, "%s was called\n", __func__);
4355 total_vfs = dev->persist->num_vfs;
4356 memcpy(nvfs, dev->persist->nvfs, sizeof(dev->persist->nvfs));
4363 mlx4_err(dev, "%s: mlx4_load_one failed, err=%d\n",
4368 err = restore_current_port_types(dev, dev->persist->
4369 curr_port_type, dev->persist->
4372 mlx4_err(dev, "could not restore original port types (%d)\n", err);
4382 struct mlx4_dev *dev = persist->dev;
4384 mlx4_info(persist->dev, "mlx4_shutdown was called\n");
4389 mlx4_pci_disable_device(dev);
4402 struct mlx4_dev *dev = persist->dev;
4404 mlx4_err(dev, "suspend was called\n");
4417 struct mlx4_dev *dev = persist->dev;
4418 struct mlx4_priv *priv = mlx4_priv(dev);
4423 mlx4_err(dev, "resume was called\n");
4424 total_vfs = dev->persist->num_vfs;
4425 memcpy(nvfs, dev->persist->nvfs, sizeof(dev->persist->nvfs));
4432 ret = restore_current_port_types(dev,
4433 dev->persist->curr_port_type,
4434 dev->persist->curr_port_poss_type);
4436 mlx4_err(dev, "resume: could not restore original port types (%d)\n", ret);