Lines Matching defs:port
101 [20] = "Address vector port checking support",
164 [35] = "Diag counters per port",
259 static int mlx4_activate_vst_qinq(struct mlx4_priv *priv, int slave, int port)
265 vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];
266 vp_admin = &priv->mfunc.master.vf_admin[slave].vport[port];
269 err = __mlx4_register_vlan(&priv->dev, port,
275 "No vlan resources slave %d, port %d\n",
276 slave, port);
279 mlx4_dbg(&priv->dev, "alloc vlan %d idx %d slave %d port %d\n",
281 vp_oper->vlan_idx, slave, port);
290 static int mlx4_handle_vst_qinq(struct mlx4_priv *priv, int slave, int port)
297 vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];
298 vp_admin = &priv->mfunc.master.vf_admin[slave].vport[port];
321 err = mlx4_activate_vst_qinq(priv, slave, port);
332 u8 field, port;
405 /* phys-port = logical-port */
410 port = vhcr->in_modifier;
411 proxy_qp = dev->phys_caps.base_proxy_sqpn + 8 * slave + port - 1;
416 if (mlx4_vf_smi_enabled(dev, slave, port) &&
425 size = dev->phys_caps.base_tunnel_sqpn + 8 * slave + port - 1;
438 vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];
439 err = mlx4_handle_vst_qinq(priv, slave, port);
444 if (dev->caps.phv_bit[port])
550 op_modifier = !!gen_or_port; /* 0 = general, 1 = logical port */
650 /* logical port query */
659 mlx4_err(dev, "VLAN is enforced on this port\n");
665 mlx4_err(dev, "Force mac is enabled on this port\n");
672 mlx4_err(dev, "phy_wqe_gid is enforced on this ib port\n");
1159 mlx4_dbg(dev, "Local CA ACK delay: %d, max MTU: %d, port width cap: %d\n",
1186 int mlx4_QUERY_PORT(struct mlx4_dev *dev, int port, struct mlx4_port_cap *port_cap)
1229 err = mlx4_cmd_box(dev, 0, mailbox->dma, port, 0, MLX4_CMD_QUERY_PORT,
1294 /* add port mng change event capability and disable mw type 1
1333 /* For guests, disable port BEACON */
1343 /* For guests, disable mw type 2 and port remap*/
1418 int port = mlx4_slave_convert_port(dev, slave,
1426 if (port < 0)
1435 vhcr->in_modifier = port;
1445 /* get port type - currently only eth is enabled */
1451 /* set port type to currently operating port type */
1460 int other_port = (port == 1) ? 2 : 1;
1473 short_field = mlx4_get_slave_num_gids(dev, slave, port);
1487 int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port,
1499 err = mlx4_cmd_box(dev, 0, mailbox->dma, port, 0,
1913 /* Check port for UD address vector: */
2243 static int check_qp0_state(struct mlx4_dev *dev, int function, int port)
2247 if (priv->mfunc.master.qp0_state[port].proxy_qp0_active &&
2248 priv->mfunc.master.qp0_state[port].qp0_active)
2260 int port = mlx4_slave_convert_port(dev, slave, vhcr->in_modifier);
2263 if (port < 0)
2266 if (priv->mfunc.master.slave_state[slave].init_port_mask & (1 << port))
2269 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) {
2270 /* Enable port only if it was previously disabled */
2271 if (!priv->mfunc.master.init_port_ref[port]) {
2272 err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_INIT_PORT,
2277 priv->mfunc.master.slave_state[slave].init_port_mask |= (1 << port);
2280 if (check_qp0_state(dev, slave, port) &&
2281 !priv->mfunc.master.qp0_state[port].port_active) {
2282 err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_INIT_PORT,
2286 priv->mfunc.master.qp0_state[port].port_active = 1;
2287 priv->mfunc.master.slave_state[slave].init_port_mask |= (1 << port);
2290 priv->mfunc.master.slave_state[slave].init_port_mask |= (1 << port);
2292 ++priv->mfunc.master.init_port_ref[port];
2296 int mlx4_INIT_PORT(struct mlx4_dev *dev, int port)
2325 flags |= (dev->caps.vl_cap[port] & 0xf) << INIT_PORT_VL_SHIFT;
2326 flags |= (dev->caps.port_width_cap[port] & 0xf) << INIT_PORT_PORT_WIDTH_SHIFT;
2329 field = 128 << dev->caps.ib_mtu_cap[port];
2331 field = dev->caps.gid_table_len[port];
2333 field = dev->caps.pkey_table_len[port];
2336 err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_INIT_PORT,
2341 err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_INIT_PORT,
2358 int port = mlx4_slave_convert_port(dev, slave, vhcr->in_modifier);
2361 if (port < 0)
2365 (1 << port)))
2368 if (dev->caps.port_mask[port] != MLX4_PORT_TYPE_IB) {
2369 if (priv->mfunc.master.init_port_ref[port] == 1) {
2370 err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_CLOSE_PORT,
2375 priv->mfunc.master.slave_state[slave].init_port_mask &= ~(1 << port);
2377 /* infiniband port */
2379 if (!priv->mfunc.master.qp0_state[port].qp0_active &&
2380 priv->mfunc.master.qp0_state[port].port_active) {
2381 err = mlx4_cmd(dev, 0, port, 0, MLX4_CMD_CLOSE_PORT,
2385 priv->mfunc.master.slave_state[slave].init_port_mask &= ~(1 << port);
2386 priv->mfunc.master.qp0_state[port].port_active = 0;
2389 priv->mfunc.master.slave_state[slave].init_port_mask &= ~(1 << port);
2391 --priv->mfunc.master.init_port_ref[port];
2395 int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port)
2397 return mlx4_cmd(dev, 0, port, 0, MLX4_CMD_CLOSE_PORT,
2606 u32 value[], size_t array_len, u8 port)
2619 ret = mlx4_cmd_box(dev, 0, mailbox->dma, port, op_modifier,
2642 u8 port;
2657 for (port = 1; port <= dev->caps.num_ports; port++) {
2658 in_mod = port << MOD_STAT_CFG_PORT_OFFSET;
2663 mlx4_err(dev, "Fail to get port %d uplink guid\n",
2664 port);
2669 dev->caps.phys_port_id[port] = (u64)guid_lo |
2678 int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port)
2680 u32 in_mod = MLX4_WOL_SETUP_MODE | port << 8;
2688 int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port)
2690 u32 in_mod = MLX4_WOL_SETUP_MODE | port << 8;
3021 static int mlx4_SET_PORT_phv_bit(struct mlx4_dev *dev, u8 port, u8 phv_bit)
3040 in_mod = MLX4_SET_PORT_GENERAL << 8 | port;
3049 int get_phv_bit(struct mlx4_dev *dev, u8 port, int *phv)
3055 err = mlx4_QUERY_FUNC_CAP(dev, port, &func_cap);
3062 int set_phv_bit(struct mlx4_dev *dev, u8 port, int new_val)
3071 ret = mlx4_SET_PORT_phv_bit(dev, port, new_val);
3073 dev->caps.phv_bit[port] = new_val;
3081 int mlx4_get_is_vlan_offload_disabled(struct mlx4_dev *dev, u8 port,
3088 err = mlx4_QUERY_FUNC_CAP(dev, port, &func_cap);