Lines Matching refs:val
39 unsigned int val;
48 regmap_read(ss->regmap[id], SGMSYS_SGMII_MODE, &val);
49 val |= SGMII_REMOTE_FAULT_DIS;
50 regmap_write(ss->regmap[id], SGMSYS_SGMII_MODE, val);
52 regmap_read(ss->regmap[id], SGMSYS_PCS_CONTROL_1, &val);
53 val |= SGMII_AN_RESTART;
54 regmap_write(ss->regmap[id], SGMSYS_PCS_CONTROL_1, val);
56 regmap_read(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, &val);
57 val &= ~SGMII_PHYA_PWD;
58 regmap_write(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, val);
66 unsigned int val;
71 regmap_read(ss->regmap[id], ss->ana_rgc3, &val);
72 val &= ~RG_PHY_SPEED_MASK;
74 val |= RG_PHY_SPEED_3_125G;
75 regmap_write(ss->regmap[id], ss->ana_rgc3, val);
78 regmap_read(ss->regmap[id], SGMSYS_PCS_CONTROL_1, &val);
79 val &= ~SGMII_AN_ENABLE;
80 regmap_write(ss->regmap[id], SGMSYS_PCS_CONTROL_1, val);
83 regmap_read(ss->regmap[id], SGMSYS_SGMII_MODE, &val);
84 val &= ~SGMII_IF_MODE_MASK;
88 val |= SGMII_SPEED_10;
91 val |= SGMII_SPEED_100;
95 val |= SGMII_SPEED_1000;
100 val |= SGMII_DUPLEX_FULL;
102 regmap_write(ss->regmap[id], SGMSYS_SGMII_MODE, val);
105 regmap_read(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, &val);
106 val &= ~SGMII_PHYA_PWD;
107 regmap_write(ss->regmap[id], SGMSYS_QPHY_PWR_STATE_CTRL, val);
115 unsigned int val, sid;
124 regmap_read(ss->regmap[sid], SGMSYS_PCS_CONTROL_1, &val);
125 val |= SGMII_AN_RESTART;
126 regmap_write(ss->regmap[sid], SGMSYS_PCS_CONTROL_1, val);