Lines Matching refs:lp
174 struct korina_private *lp = netdev_priv(dev);
176 korina_abort_dma(dev, lp->tx_dma_regs);
181 struct korina_private *lp = netdev_priv(dev);
183 korina_abort_dma(dev, lp->rx_dma_regs);
186 static void korina_start_rx(struct korina_private *lp,
189 korina_start_dma(lp->rx_dma_regs, CPHYSADDR(rd));
192 static void korina_chain_rx(struct korina_private *lp,
195 korina_chain_dma(lp->rx_dma_regs, CPHYSADDR(rd));
201 struct korina_private *lp = netdev_priv(dev);
207 spin_lock_irqsave(&lp->lock, flags);
209 td = &lp->td_ring[lp->tx_chain_tail];
212 if (lp->tx_count >= (KORINA_NUM_TDS - 2)) {
213 lp->tx_full = 1;
215 if (lp->tx_count == (KORINA_NUM_TDS - 2))
220 spin_unlock_irqrestore(&lp->lock, flags);
226 lp->tx_count++;
228 lp->tx_skb[lp->tx_chain_tail] = skb;
236 chain_prev = (lp->tx_chain_tail - 1) & KORINA_TDS_MASK;
237 chain_next = (lp->tx_chain_tail + 1) & KORINA_TDS_MASK;
239 if (readl(&(lp->tx_dma_regs->dmandptr)) == 0) {
240 if (lp->tx_chain_status == desc_empty) {
245 lp->tx_chain_tail = chain_next;
247 writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
248 &lp->tx_dma_regs->dmandptr);
250 lp->tx_chain_head = lp->tx_chain_tail;
256 lp->td_ring[chain_prev].control &=
259 lp->td_ring[chain_prev].link = CPHYSADDR(td);
261 lp->tx_chain_tail = chain_next;
263 writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
264 &(lp->tx_dma_regs->dmandptr));
266 lp->tx_chain_head = lp->tx_chain_tail;
267 lp->tx_chain_status = desc_empty;
270 if (lp->tx_chain_status == desc_empty) {
275 lp->tx_chain_tail = chain_next;
276 lp->tx_chain_status = desc_filled;
281 lp->td_ring[chain_prev].control &=
283 lp->td_ring[chain_prev].link = CPHYSADDR(td);
284 lp->tx_chain_tail = chain_next;
290 spin_unlock_irqrestore(&lp->lock, flags);
297 struct korina_private *lp = netdev_priv(dev);
300 mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
302 writel(0, &lp->eth_regs->miimcfg);
303 writel(0, &lp->eth_regs->miimcmd);
304 writel(mii_id | reg, &lp->eth_regs->miimaddr);
305 writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
307 ret = (int)(readl(&lp->eth_regs->miimrdd));
313 struct korina_private *lp = netdev_priv(dev);
315 mii_id = ((lp->rx_irq == 0x2c ? 1 : 0) << 8);
317 writel(0, &lp->eth_regs->miimcfg);
318 writel(1, &lp->eth_regs->miimcmd);
319 writel(mii_id | reg, &lp->eth_regs->miimaddr);
320 writel(ETH_MII_CMD_SCN, &lp->eth_regs->miimcmd);
321 writel(val, &lp->eth_regs->miimwtd);
328 struct korina_private *lp = netdev_priv(dev);
332 dmas = readl(&lp->rx_dma_regs->dmas);
334 dmasm = readl(&lp->rx_dma_regs->dmasm);
337 &lp->rx_dma_regs->dmasm);
339 napi_schedule(&lp->napi);
353 struct korina_private *lp = netdev_priv(dev);
354 struct dma_desc *rd = &lp->rd_ring[lp->rx_next_done];
363 skb = lp->rx_skb[lp->rx_next_done];
399 pkt_buf = (u8 *)lp->rx_skb[lp->rx_next_done]->data;
414 napi_gro_receive(&lp->napi, skb);
422 lp->rx_skb[lp->rx_next_done] = skb_new;
435 lp->rd_ring[(lp->rx_next_done - 1) &
439 lp->rx_next_done = (lp->rx_next_done + 1) & KORINA_RDS_MASK;
441 rd = &lp->rd_ring[lp->rx_next_done];
442 writel(~DMA_STAT_DONE, &lp->rx_dma_regs->dmas);
445 dmas = readl(&lp->rx_dma_regs->dmas);
449 &lp->rx_dma_regs->dmas);
451 lp->dma_halt_cnt++;
453 skb = lp->rx_skb[lp->rx_next_done];
456 korina_chain_rx(lp, rd);
464 struct korina_private *lp =
466 struct net_device *dev = lp->dev;
473 writel(readl(&lp->rx_dma_regs->dmasm) &
475 &lp->rx_dma_regs->dmasm);
485 struct korina_private *lp = netdev_priv(dev);
513 &lp->eth_regs->ethhash0);
515 &lp->eth_regs->ethhash1);
518 spin_lock_irqsave(&lp->lock, flags);
519 writel(recognise, &lp->eth_regs->etharc);
520 spin_unlock_irqrestore(&lp->lock, flags);
525 struct korina_private *lp = netdev_priv(dev);
526 struct dma_desc *td = &lp->td_ring[lp->tx_next_done];
530 spin_lock(&lp->lock);
534 if (lp->tx_full == 1) {
536 lp->tx_full = 0;
539 devcs = lp->td_ring[lp->tx_next_done].devcs;
551 lp->tx_skb[lp->tx_next_done]->len;
578 if (lp->tx_skb[lp->tx_next_done]) {
579 dev_kfree_skb_any(lp->tx_skb[lp->tx_next_done]);
580 lp->tx_skb[lp->tx_next_done] = NULL;
583 lp->td_ring[lp->tx_next_done].control = DMA_DESC_IOF;
584 lp->td_ring[lp->tx_next_done].devcs = ETH_TX_FD | ETH_TX_LD;
585 lp->td_ring[lp->tx_next_done].link = 0;
586 lp->td_ring[lp->tx_next_done].ca = 0;
587 lp->tx_count--;
590 lp->tx_next_done = (lp->tx_next_done + 1) & KORINA_TDS_MASK;
591 td = &lp->td_ring[lp->tx_next_done];
596 dmas = readl(&lp->tx_dma_regs->dmas);
597 writel(~dmas, &lp->tx_dma_regs->dmas);
599 writel(readl(&lp->tx_dma_regs->dmasm) &
601 &lp->tx_dma_regs->dmasm);
603 spin_unlock(&lp->lock);
610 struct korina_private *lp = netdev_priv(dev);
614 dmas = readl(&lp->tx_dma_regs->dmas);
617 dmasm = readl(&lp->tx_dma_regs->dmasm);
619 &lp->tx_dma_regs->dmasm);
623 if (lp->tx_chain_status == desc_filled &&
624 (readl(&(lp->tx_dma_regs->dmandptr)) == 0)) {
625 writel(CPHYSADDR(&lp->td_ring[lp->tx_chain_head]),
626 &(lp->tx_dma_regs->dmandptr));
627 lp->tx_chain_status = desc_empty;
628 lp->tx_chain_head = lp->tx_chain_tail;
644 struct korina_private *lp = netdev_priv(dev);
646 mii_check_media(&lp->mii_if, 0, init_media);
648 if (lp->mii_if.full_duplex)
649 writel(readl(&lp->eth_regs->ethmac2) | ETH_MAC2_FD,
650 &lp->eth_regs->ethmac2);
652 writel(readl(&lp->eth_regs->ethmac2) & ~ETH_MAC2_FD,
653 &lp->eth_regs->ethmac2);
658 struct korina_private *lp = from_timer(lp, t, media_check_timer);
659 struct net_device *dev = lp->dev;
662 mod_timer(&lp->media_check_timer, jiffies + HZ);
677 struct korina_private *lp = netdev_priv(dev);
683 spin_lock_irq(&lp->lock);
684 rc = generic_mii_ioctl(&lp->mii_if, data, cmd, NULL);
685 spin_unlock_irq(&lp->lock);
686 korina_set_carrier(&lp->mii_if);
695 struct korina_private *lp = netdev_priv(dev);
699 strlcpy(info->bus_info, lp->dev->name, sizeof(info->bus_info));
705 struct korina_private *lp = netdev_priv(dev);
707 spin_lock_irq(&lp->lock);
708 mii_ethtool_get_link_ksettings(&lp->mii_if, cmd);
709 spin_unlock_irq(&lp->lock);
717 struct korina_private *lp = netdev_priv(dev);
720 spin_lock_irq(&lp->lock);
721 rc = mii_ethtool_set_link_ksettings(&lp->mii_if, cmd);
722 spin_unlock_irq(&lp->lock);
723 korina_set_carrier(&lp->mii_if);
730 struct korina_private *lp = netdev_priv(dev);
732 return mii_link_ok(&lp->mii_if);
744 struct korina_private *lp = netdev_priv(dev);
750 lp->td_ring[i].control = DMA_DESC_IOF;
751 lp->td_ring[i].devcs = ETH_TX_FD | ETH_TX_LD;
752 lp->td_ring[i].ca = 0;
753 lp->td_ring[i].link = 0;
755 lp->tx_next_done = lp->tx_chain_head = lp->tx_chain_tail =
756 lp->tx_full = lp->tx_count = 0;
757 lp->tx_chain_status = desc_empty;
764 lp->rx_skb[i] = skb;
765 lp->rd_ring[i].control = DMA_DESC_IOD |
767 lp->rd_ring[i].devcs = 0;
768 lp->rd_ring[i].ca = CPHYSADDR(skb->data);
769 lp->rd_ring[i].link = CPHYSADDR(&lp->rd_ring[i+1]);
774 lp->rd_ring[i - 1].link = CPHYSADDR(&lp->rd_ring[0]);
775 lp->rd_ring[i - 1].control |= DMA_DESC_COD;
777 lp->rx_next_done = 0;
778 lp->rx_chain_head = 0;
779 lp->rx_chain_tail = 0;
780 lp->rx_chain_status = desc_empty;
787 struct korina_private *lp = netdev_priv(dev);
791 lp->rd_ring[i].control = 0;
792 if (lp->rx_skb[i])
793 dev_kfree_skb_any(lp->rx_skb[i]);
794 lp->rx_skb[i] = NULL;
798 lp->td_ring[i].control = 0;
799 if (lp->tx_skb[i])
800 dev_kfree_skb_any(lp->tx_skb[i]);
801 lp->tx_skb[i] = NULL;
810 struct korina_private *lp = netdev_priv(dev);
817 writel(0, &lp->eth_regs->ethintfc);
818 while ((readl(&lp->eth_regs->ethintfc) & ETH_INT_FC_RIP))
822 writel(ETH_INT_FC_EN, &lp->eth_regs->ethintfc);
831 writel(0, &lp->rx_dma_regs->dmas);
833 korina_start_rx(lp, &lp->rd_ring[0]);
835 writel(readl(&lp->tx_dma_regs->dmasm) &
837 &lp->tx_dma_regs->dmasm);
838 writel(readl(&lp->rx_dma_regs->dmasm) &
840 &lp->rx_dma_regs->dmasm);
843 writel(ETH_ARC_AB, &lp->eth_regs->etharc);
846 writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal0);
847 writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah0);
849 writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal1);
850 writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah1);
852 writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal2);
853 writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah2);
855 writel(STATION_ADDRESS_LOW(dev), &lp->eth_regs->ethsal3);
856 writel(STATION_ADDRESS_HIGH(dev), &lp->eth_regs->ethsah3);
861 &lp->eth_regs->ethmac2);
864 writel(0x15, &lp->eth_regs->ethipgt);
866 writel(0x12, &lp->eth_regs->ethipgr);
871 &lp->eth_regs->ethmcp);
874 writel(48, &lp->eth_regs->ethfifott);
876 writel(ETH_MAC1_RE, &lp->eth_regs->ethmac1);
878 napi_enable(&lp->napi);
889 struct korina_private *lp = container_of(work,
891 struct net_device *dev = lp->dev;
896 disable_irq(lp->rx_irq);
897 disable_irq(lp->tx_irq);
899 writel(readl(&lp->tx_dma_regs->dmasm) |
901 &lp->tx_dma_regs->dmasm);
902 writel(readl(&lp->rx_dma_regs->dmasm) |
904 &lp->rx_dma_regs->dmasm);
906 napi_disable(&lp->napi);
916 enable_irq(lp->tx_irq);
917 enable_irq(lp->rx_irq);
922 struct korina_private *lp = netdev_priv(dev);
924 schedule_work(&lp->restart_task);
938 struct korina_private *lp = netdev_priv(dev);
950 ret = request_irq(lp->rx_irq, korina_rx_dma_interrupt,
954 dev->name, lp->rx_irq);
957 ret = request_irq(lp->tx_irq, korina_tx_dma_interrupt,
961 dev->name, lp->tx_irq);
965 mod_timer(&lp->media_check_timer, jiffies + 1);
970 free_irq(lp->rx_irq, dev);
978 struct korina_private *lp = netdev_priv(dev);
981 del_timer(&lp->media_check_timer);
984 disable_irq(lp->rx_irq);
985 disable_irq(lp->tx_irq);
988 tmp = readl(&lp->tx_dma_regs->dmasm);
990 writel(tmp, &lp->tx_dma_regs->dmasm);
993 tmp = readl(&lp->rx_dma_regs->dmasm);
995 writel(tmp, &lp->rx_dma_regs->dmasm);
997 napi_disable(&lp->napi);
999 cancel_work_sync(&lp->restart_task);
1003 free_irq(lp->rx_irq, dev);
1004 free_irq(lp->tx_irq, dev);
1026 struct korina_private *lp;
1036 lp = netdev_priv(dev);
1041 lp->rx_irq = platform_get_irq_byname(pdev, "korina_rx");
1042 lp->tx_irq = platform_get_irq_byname(pdev, "korina_tx");
1046 lp->eth_regs = ioremap(r->start, resource_size(r));
1047 if (!lp->eth_regs) {
1054 lp->rx_dma_regs = ioremap(r->start, resource_size(r));
1055 if (!lp->rx_dma_regs) {
1062 lp->tx_dma_regs = ioremap(r->start, resource_size(r));
1063 if (!lp->tx_dma_regs) {
1069 lp->td_ring = kmalloc(TD_RING_SIZE + RD_RING_SIZE, GFP_KERNEL);
1070 if (!lp->td_ring) {
1075 dma_cache_inv((unsigned long)(lp->td_ring),
1079 lp->td_ring = (struct dma_desc *)KSEG1ADDR(lp->td_ring);
1080 lp->rd_ring = &lp->td_ring[KORINA_NUM_TDS];
1082 spin_lock_init(&lp->lock);
1084 dev->irq = lp->rx_irq;
1085 lp->dev = dev;
1090 netif_napi_add(dev, &lp->napi, korina_poll, NAPI_POLL_WEIGHT);
1092 lp->phy_addr = (((lp->rx_irq == 0x2c? 1:0) << 8) | 0x05);
1093 lp->mii_if.dev = dev;
1094 lp->mii_if.mdio_read = mdio_read;
1095 lp->mii_if.mdio_write = mdio_write;
1096 lp->mii_if.phy_id = lp->phy_addr;
1097 lp->mii_if.phy_id_mask = 0x1f;
1098 lp->mii_if.reg_num_mask = 0x1f;
1106 timer_setup(&lp->media_check_timer, korina_poll_media, 0);
1108 INIT_WORK(&lp->restart_task, korina_restart_task);
1116 kfree((struct dma_desc *)KSEG0ADDR(lp->td_ring));
1118 iounmap(lp->tx_dma_regs);
1120 iounmap(lp->rx_dma_regs);
1122 iounmap(lp->eth_regs);
1131 struct korina_private *lp = netdev_priv(bif->dev);
1133 iounmap(lp->eth_regs);
1134 iounmap(lp->rx_dma_regs);
1135 iounmap(lp->tx_dma_regs);
1136 kfree((struct dma_desc *)KSEG0ADDR(lp->td_ring));