Lines Matching refs:msgbuf
109 u32 msgbuf[3];
110 u8 *addr = (u8 *)(&msgbuf[1]);
128 msgbuf[0] = E1000_VF_RESET;
129 mbx->ops.write_posted(hw, msgbuf, 1);
134 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
136 switch (msgbuf[0]) {
213 u32 msgbuf[E1000_VFMAILBOX_SIZE];
214 u16 *hash_list = (u16 *)&msgbuf[1];
229 msgbuf[0] = E1000_VF_SET_MULTICAST;
230 msgbuf[0] |= cnt << E1000_VT_MSGINFO_SHIFT;
238 ret_val = mbx->ops.write_posted(hw, msgbuf, E1000_VFMAILBOX_SIZE);
240 mbx->ops.read_posted(hw, msgbuf, 1);
252 u32 msgbuf[2];
255 msgbuf[0] = E1000_VF_SET_VLAN;
256 msgbuf[1] = vid;
259 msgbuf[0] |= BIT(E1000_VT_MSGINFO_SHIFT);
261 mbx->ops.write_posted(hw, msgbuf, 2);
263 err = mbx->ops.read_posted(hw, msgbuf, 2);
265 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
268 if (!err && (msgbuf[0] == (E1000_VF_SET_VLAN | E1000_VT_MSGTYPE_NACK)))
282 u32 msgbuf[2];
285 msgbuf[0] = E1000_VF_SET_LPE;
286 msgbuf[1] = max_size;
288 ret_val = mbx->ops.write_posted(hw, msgbuf, 2);
290 mbx->ops.read_posted(hw, msgbuf, 1);
302 u32 msgbuf[3];
303 u8 *msg_addr = (u8 *)(&msgbuf[1]);
306 memset(msgbuf, 0, 12);
307 msgbuf[0] = E1000_VF_SET_MAC_ADDR;
309 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
312 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
314 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
318 (msgbuf[0] == (E1000_VF_SET_MAC_ADDR | E1000_VT_MSGTYPE_NACK)))
342 u32 msgbuf[3], msgbuf_chk;
343 u8 *msg_addr = (u8 *)(&msgbuf[1]);
346 memset(msgbuf, 0, sizeof(msgbuf));
347 msgbuf[0] |= sub_cmd;
348 msgbuf[0] |= E1000_VF_SET_MAC_ADDR;
349 msgbuf_chk = msgbuf[0];
354 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
357 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
359 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
362 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
364 if (msgbuf[0] == (msgbuf_chk | E1000_VT_MSGTYPE_NACK))