Lines Matching defs:cache
312 Add cache locks to prevent a race condition as
826 u_long lock; /* Lock the cache accesses */
837 } cache;
1142 skb_queue_head_init(&lp->cache.queue);
1143 lp->cache.gepc = GEP_INIT;
1476 /* Test if cache is already locked - requeue skb if so */
1477 if (test_and_set_bit(0, (void *)&lp->cache.lock) && !lp->interrupt)
1492 if (!skb_queue_empty(&lp->cache.queue) && !lp->interrupt) {
1516 lp->cache.lock = 0;
1586 if (!test_and_set_bit(0, (void *)&lp->cache.lock)) {
1587 while (!skb_queue_empty(&lp->cache.queue) && !netif_queue_stopped(dev) && lp->tx_enable) {
1590 lp->cache.lock = 0;
3669 __skb_queue_purge(&lp->cache.queue);
3686 if (!lp->cache.save_cnt) {
3693 lp->cache.save_cnt++;
3706 if (lp->cache.save_cnt) {
3724 lp->cache.save_cnt--;
3737 lp->cache.csr0 = inl(DE4X5_BMR);
3738 lp->cache.csr6 = (inl(DE4X5_OMR) & ~(OMR_ST | OMR_SR));
3739 lp->cache.csr7 = inl(DE4X5_IMR);
3743 outl(lp->cache.csr0, DE4X5_BMR);
3744 outl(lp->cache.csr6, DE4X5_OMR);
3745 outl(lp->cache.csr7, DE4X5_IMR);
3747 gep_wr(lp->cache.gepc, dev);
3748 gep_wr(lp->cache.gep, dev);
3750 reset_init_sia(dev, lp->cache.csr13, lp->cache.csr14,
3751 lp->cache.csr15);
3762 __skb_queue_tail(&lp->cache.queue, skb);
3770 __skb_queue_head(&lp->cache.queue, skb);
3778 return __skb_dequeue(&lp->cache.queue);
3846 csr15 = lp->cache.csr15;
3847 csr14 = lp->cache.csr14;
3848 csr13 = lp->cache.csr13;
3849 outl(csr15 | lp->cache.gepc, DE4X5_SIGR);
3850 outl(csr15 | lp->cache.gep, DE4X5_SIGR);
4349 lp->cache.gepc = (*p++ | GEP_CTRL);
4350 gep_wr(lp->cache.gepc, dev);
4402 outl(lp->cache.csr14, DE4X5_STRR);
4403 outl(lp->cache.csr13, DE4X5_SICR);
4430 lp->cache.gepc = (*p++ | GEP_CTRL);
4547 gep_wr(lp->cache.gepc, dev);
4549 lp->cache.gep = *p++;
4587 gep_wr(lp->cache.gepc, dev);
4590 lp->cache.gep = *p++;
4670 lp->cache.csr13 = get_unaligned_le16(p); p += 2;
4671 lp->cache.csr14 = get_unaligned_le16(p); p += 2;
4672 lp->cache.csr15 = get_unaligned_le16(p); p += 2;
4674 lp->cache.csr13 = CSR13;
4675 lp->cache.csr14 = CSR14;
4676 lp->cache.csr15 = CSR15;
4678 lp->cache.gepc = ((s32)(get_unaligned_le16(p)) << 16); p += 2;
4679 lp->cache.gep = ((s32)(get_unaligned_le16(p)) << 16);
4755 lp->cache.csr13 = CSR13; /* Hard coded defaults */
4756 lp->cache.csr14 = CSR14;
4757 lp->cache.csr15 = CSR15;
4758 lp->cache.gepc = ((s32)(get_unaligned_le16(p)) << 16); p += 2;
4759 lp->cache.gep = ((s32)(get_unaligned_le16(p)) << 16); p += 2;
5098 gep_wr(lp->cache.gepc, dev);
5099 gep_wr(lp->cache.gep, dev);
5101 reset_init_sia(dev, lp->cache.csr13, lp->cache.csr14, lp->cache.csr15);
5122 outl((data<<16) | lp->cache.csr15, DE4X5_SIGR);