Lines Matching refs:db
142 #define dm9000_dbg(db, lev, msg...) do { \
144 dev_dbg(db->dev, msg); \
159 ior(struct board_info *db, int reg)
161 writeb(reg, db->io_addr);
162 return readb(db->io_data);
170 iow(struct board_info *db, int reg, int value)
172 writeb(reg, db->io_addr);
173 writeb(value, db->io_data);
177 dm9000_reset(struct board_info *db)
179 dev_dbg(db->dev, "resetting device\n");
185 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
187 if (ior(db, DM9000_NCR) & 1)
188 dev_err(db->dev, "dm9000 did not respond to first reset\n");
190 iow(db, DM9000_NCR, 0);
191 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
193 if (ior(db, DM9000_NCR) & 1)
194 dev_err(db->dev, "dm9000 did not respond to second reset\n");
269 static void dm9000_msleep(struct board_info *db, unsigned int ms)
271 if (db->in_suspend || db->in_timeout)
281 struct board_info *db = netdev_priv(dev);
286 mutex_lock(&db->addr_lock);
288 spin_lock_irqsave(&db->lock, flags);
291 reg_save = readb(db->io_addr);
294 iow(db, DM9000_EPAR, DM9000_PHY | reg);
297 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS);
299 writeb(reg_save, db->io_addr);
300 spin_unlock_irqrestore(&db->lock, flags);
302 dm9000_msleep(db, 1); /* Wait read complete */
304 spin_lock_irqsave(&db->lock, flags);
305 reg_save = readb(db->io_addr);
307 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
310 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
313 writeb(reg_save, db->io_addr);
314 spin_unlock_irqrestore(&db->lock, flags);
316 mutex_unlock(&db->addr_lock);
318 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
327 struct board_info *db = netdev_priv(dev);
331 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
332 if (!db->in_timeout)
333 mutex_lock(&db->addr_lock);
335 spin_lock_irqsave(&db->lock, flags);
338 reg_save = readb(db->io_addr);
341 iow(db, DM9000_EPAR, DM9000_PHY | reg);
344 iow(db, DM9000_EPDRL, value);
345 iow(db, DM9000_EPDRH, value >> 8);
348 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW);
350 writeb(reg_save, db->io_addr);
351 spin_unlock_irqrestore(&db->lock, flags);
353 dm9000_msleep(db, 1); /* Wait write complete */
355 spin_lock_irqsave(&db->lock, flags);
356 reg_save = readb(db->io_addr);
358 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
361 writeb(reg_save, db->io_addr);
363 spin_unlock_irqrestore(&db->lock, flags);
364 if (!db->in_timeout)
365 mutex_unlock(&db->addr_lock);
374 static void dm9000_set_io(struct board_info *db, int byte_width)
382 db->dumpblk = dm9000_dumpblk_8bit;
383 db->outblk = dm9000_outblk_8bit;
384 db->inblk = dm9000_inblk_8bit;
389 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
392 db->dumpblk = dm9000_dumpblk_16bit;
393 db->outblk = dm9000_outblk_16bit;
394 db->inblk = dm9000_inblk_16bit;
399 db->dumpblk = dm9000_dumpblk_32bit;
400 db->outblk = dm9000_outblk_32bit;
401 db->inblk = dm9000_inblk_32bit;
406 static void dm9000_schedule_poll(struct board_info *db)
408 if (db->type == TYPE_DM9000E)
409 schedule_delayed_work(&db->phy_poll, HZ * 2);
423 dm9000_read_locked(struct board_info *db, int reg)
428 spin_lock_irqsave(&db->lock, flags);
429 ret = ior(db, reg);
430 spin_unlock_irqrestore(&db->lock, flags);
435 static int dm9000_wait_eeprom(struct board_info *db)
452 status = dm9000_read_locked(db, DM9000_EPCR);
460 dev_dbg(db->dev, "timeout waiting EEPROM\n");
472 dm9000_read_eeprom(struct board_info *db, int offset, u8 *to)
476 if (db->flags & DM9000_PLATF_NO_EEPROM) {
482 mutex_lock(&db->addr_lock);
484 spin_lock_irqsave(&db->lock, flags);
486 iow(db, DM9000_EPAR, offset);
487 iow(db, DM9000_EPCR, EPCR_ERPRR);
489 spin_unlock_irqrestore(&db->lock, flags);
491 dm9000_wait_eeprom(db);
496 spin_lock_irqsave(&db->lock, flags);
498 iow(db, DM9000_EPCR, 0x0);
500 to[0] = ior(db, DM9000_EPDRL);
501 to[1] = ior(db, DM9000_EPDRH);
503 spin_unlock_irqrestore(&db->lock, flags);
505 mutex_unlock(&db->addr_lock);
512 dm9000_write_eeprom(struct board_info *db, int offset, u8 *data)
516 if (db->flags & DM9000_PLATF_NO_EEPROM)
519 mutex_lock(&db->addr_lock);
521 spin_lock_irqsave(&db->lock, flags);
522 iow(db, DM9000_EPAR, offset);
523 iow(db, DM9000_EPDRH, data[1]);
524 iow(db, DM9000_EPDRL, data[0]);
525 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
526 spin_unlock_irqrestore(&db->lock, flags);
528 dm9000_wait_eeprom(db);
532 spin_lock_irqsave(&db->lock, flags);
533 iow(db, DM9000_EPCR, 0);
534 spin_unlock_irqrestore(&db->lock, flags);
536 mutex_unlock(&db->addr_lock);
751 static void dm9000_show_carrier(struct board_info *db,
755 struct net_device *ndev = db->ndev;
756 struct mii_if_info *mii = &db->mii;
757 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
761 dev_info(db->dev,
766 dev_info(db->dev, "%s: link down\n", ndev->name);
774 struct board_info *db = container_of(dw, struct board_info, phy_poll);
775 struct net_device *ndev = db->ndev;
777 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
778 !(db->flags & DM9000_PLATF_EXT_PHY)) {
779 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
786 if (netif_msg_link(db))
787 dm9000_show_carrier(db, new_carrier, nsr);
795 mii_check_media(&db->mii, netif_msg_link(db), 0);
798 dm9000_schedule_poll(db);
807 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
811 iounmap(db->io_addr);
812 iounmap(db->io_data);
816 if (db->data_req)
817 release_resource(db->data_req);
818 kfree(db->data_req);
820 if (db->addr_req)
821 release_resource(db->addr_req);
822 kfree(db->addr_req);
842 struct board_info *db = netdev_priv(dev);
849 dm9000_dbg(db, 1, "entering %s\n", __func__);
852 iow(db, oft, dev->dev_addr[i]);
868 iow(db, oft++, hash_table[i]);
869 iow(db, oft++, hash_table[i] >> 8);
872 iow(db, DM9000_RCR, rcr);
878 struct board_info *db = netdev_priv(dev);
881 spin_lock_irqsave(&db->lock, flags);
883 spin_unlock_irqrestore(&db->lock, flags);
887 dm9000_mask_interrupts(struct board_info *db)
889 iow(db, DM9000_IMR, IMR_PAR);
893 dm9000_unmask_interrupts(struct board_info *db)
895 iow(db, DM9000_IMR, db->imr_all);
904 struct board_info *db = netdev_priv(dev);
908 dm9000_dbg(db, 1, "entering %s\n", __func__);
910 dm9000_reset(db);
911 dm9000_mask_interrupts(db);
914 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
918 iow(db, DM9000_RCSR,
921 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
922 iow(db, DM9000_GPR, 0);
927 if (db->type == TYPE_DM9000B) {
932 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
937 if (db->wake_supported)
940 iow(db, DM9000_NCR, ncr);
943 iow(db, DM9000_TCR, 0); /* TX Polling clear */
944 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
945 iow(db, DM9000_FCR, 0xff); /* Flow Control */
946 iow(db, DM9000_SMCR, 0); /* Special Mode */
948 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
949 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
955 if (db->type != TYPE_DM9000E)
958 db->imr_all = imr;
961 db->tx_pkt_cnt = 0;
962 db->queue_pkt_len = 0;
969 struct board_info *db = netdev_priv(dev);
974 spin_lock_irqsave(&db->lock, flags);
975 db->in_timeout = 1;
976 reg_save = readb(db->io_addr);
980 dm9000_unmask_interrupts(db);
986 writeb(reg_save, db->io_addr);
987 db->in_timeout = 0;
988 spin_unlock_irqrestore(&db->lock, flags);
1022 struct board_info *db = netdev_priv(dev);
1024 dm9000_dbg(db, 3, "%s:\n", __func__);
1026 if (db->tx_pkt_cnt > 1)
1029 spin_lock_irqsave(&db->lock, flags);
1032 writeb(DM9000_MWCMD, db->io_addr);
1034 (db->outblk)(db->io_data, skb->data, skb->len);
1037 db->tx_pkt_cnt++;
1039 if (db->tx_pkt_cnt == 1) {
1043 db->queue_pkt_len = skb->len;
1044 db->queue_ip_summed = skb->ip_summed;
1048 spin_unlock_irqrestore(&db->lock, flags);
1061 static void dm9000_tx_done(struct net_device *dev, struct board_info *db)
1063 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
1067 db->tx_pkt_cnt--;
1070 if (netif_msg_tx_done(db))
1071 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
1074 if (db->tx_pkt_cnt > 0)
1075 dm9000_send_packet(dev, db->queue_ip_summed,
1076 db->queue_pkt_len);
1093 struct board_info *db = netdev_priv(dev);
1102 ior(db, DM9000_MRCMDX); /* Dummy read */
1105 rxbyte = readb(db->io_data);
1109 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1110 iow(db, DM9000_RCR, 0x00); /* Stop Device */
1119 writeb(DM9000_MRCMD, db->io_addr);
1121 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1125 if (netif_msg_rx_status(db))
1126 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
1132 if (netif_msg_rx_err(db))
1133 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1137 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1146 if (netif_msg_rx_err(db))
1147 dev_dbg(db->dev, "fifo error\n");
1151 if (netif_msg_rx_err(db))
1152 dev_dbg(db->dev, "crc error\n");
1156 if (netif_msg_rx_err(db))
1157 dev_dbg(db->dev, "length error\n");
1170 (db->inblk)(db->io_data, rdptr, RxLen);
1187 (db->dumpblk)(db->io_data, RxLen);
1195 struct board_info *db = netdev_priv(dev);
1200 dm9000_dbg(db, 3, "entering %s\n", __func__);
1204 /* holders of db->lock must always block IRQs */
1205 spin_lock_irqsave(&db->lock, flags);
1208 reg_save = readb(db->io_addr);
1210 dm9000_mask_interrupts(db);
1212 int_status = ior(db, DM9000_ISR); /* Got ISR */
1213 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1215 if (netif_msg_intr(db))
1216 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1224 dm9000_tx_done(dev, db);
1226 if (db->type != TYPE_DM9000E) {
1229 schedule_delayed_work(&db->phy_poll, 1);
1233 dm9000_unmask_interrupts(db);
1235 writeb(reg_save, db->io_addr);
1237 spin_unlock_irqrestore(&db->lock, flags);
1245 struct board_info *db = netdev_priv(dev);
1249 spin_lock_irqsave(&db->lock, flags);
1251 nsr = ior(db, DM9000_NSR);
1252 wcr = ior(db, DM9000_WCR);
1254 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1258 iow(db, DM9000_NSR, NSR_WAKEST);
1261 dev_info(db->dev, "wake by link status change\n");
1263 dev_info(db->dev, "wake by sample packet\n");
1265 dev_info(db->dev, "wake by magic packet\n");
1267 dev_err(db->dev, "wake signalled with no reason? "
1271 spin_unlock_irqrestore(&db->lock, flags);
1295 struct board_info *db = netdev_priv(dev);
1298 if (netif_msg_ifup(db))
1299 dev_dbg(db->dev, "enabling %s\n", dev->name);
1305 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1310 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1321 dm9000_unmask_interrupts(db);
1324 db->dbug_cnt = 0;
1326 mii_check_media(&db->mii, netif_msg_link(db), 1);
1330 schedule_delayed_work(&db->phy_poll, 1);
1338 struct board_info *db = netdev_priv(dev);
1342 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1343 dm9000_mask_interrupts(db);
1344 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1354 struct board_info *db = netdev_priv(ndev);
1356 if (netif_msg_ifdown(db))
1357 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1359 cancel_delayed_work_sync(&db->phy_poll);
1421 struct board_info *db; /* Point a board information structure */
1487 db = netdev_priv(ndev);
1489 db->dev = &pdev->dev;
1490 db->ndev = ndev;
1492 db->power_supply = power;
1494 spin_lock_init(&db->lock);
1495 mutex_init(&db->addr_lock);
1497 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1499 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1500 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1502 if (!db->addr_res || !db->data_res) {
1503 dev_err(db->dev, "insufficient resources addr=%p data=%p\n",
1504 db->addr_res, db->data_res);
1515 db->irq_wake = platform_get_irq_optional(pdev, 1);
1516 if (db->irq_wake >= 0) {
1517 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1519 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1520 IRQF_SHARED, dev_name(db->dev), ndev);
1522 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1526 ret = irq_set_irq_wake(db->irq_wake, 1);
1528 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1529 db->irq_wake, ret);
1532 irq_set_irq_wake(db->irq_wake, 0);
1533 db->wake_supported = 1;
1538 iosize = resource_size(db->addr_res);
1539 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1542 if (db->addr_req == NULL) {
1543 dev_err(db->dev, "cannot claim address reg area\n");
1548 db->io_addr = ioremap(db->addr_res->start, iosize);
1550 if (db->io_addr == NULL) {
1551 dev_err(db->dev, "failed to ioremap address reg\n");
1556 iosize = resource_size(db->data_res);
1557 db->data_req = request_mem_region(db->data_res->start, iosize,
1560 if (db->data_req == NULL) {
1561 dev_err(db->dev, "cannot claim data reg area\n");
1566 db->io_data = ioremap(db->data_res->start, iosize);
1568 if (db->io_data == NULL) {
1569 dev_err(db->dev, "failed to ioremap data reg\n");
1575 ndev->base_addr = (unsigned long)db->io_addr;
1578 dm9000_set_io(db, iosize);
1586 dm9000_set_io(db, 1);
1589 dm9000_set_io(db, 2);
1592 dm9000_set_io(db, 4);
1598 db->inblk = pdata->inblk;
1601 db->outblk = pdata->outblk;
1604 db->dumpblk = pdata->dumpblk;
1606 db->flags = pdata->flags;
1610 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1613 dm9000_reset(db);
1617 id_val = ior(db, DM9000_VIDL);
1618 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1619 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1620 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1624 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1628 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1635 id_val = ior(db, DM9000_CHIPR);
1636 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1640 db->type = TYPE_DM9000A;
1643 db->type = TYPE_DM9000B;
1646 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1647 db->type = TYPE_DM9000E;
1651 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1662 db->msg_enable = NETIF_MSG_LINK;
1663 db->mii.phy_id_mask = 0x1f;
1664 db->mii.reg_num_mask = 0x1f;
1665 db->mii.force_media = 0;
1666 db->mii.full_duplex = 0;
1667 db->mii.dev = ndev;
1668 db->mii.mdio_read = dm9000_phy_read;
1669 db->mii.mdio_write = dm9000_phy_write;
1675 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1687 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1702 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please set using ip\n",
1705 ndev->name, dm9000_type_to_char(db->type),
1706 db->io_addr, db->io_data, ndev->irq,
1712 dev_err(db->dev, "not found (%d).\n", ret);
1714 dm9000_release_board(pdev, db);
1728 struct board_info *db;
1731 db = netdev_priv(ndev);
1732 db->in_suspend = 1;
1740 if (!db->wake_state)
1750 struct board_info *db = netdev_priv(ndev);
1756 if (!db->wake_state) {
1758 dm9000_unmask_interrupts(db);
1764 db->in_suspend = 0;