Lines Matching refs:workaround
183 * works around this bug by double copying the packet. This workaround
4847 /* 5701 {A0,B0} CRC bug workaround */
5509 int workaround, port_a;
5513 workaround = 0;
5519 workaround = 1;
5532 if (workaround) {
5571 if (workaround)
5609 if (workaround) {
7874 /* Use GSO to workaround all TSO packets that meet HW bug conditions
8131 /* If the workaround fails due to memory/mapping
9103 * hardware workaround, while we do the reset.
9175 /* restore 5701 hardware bug workaround write method */
10100 * south bridge limitation. As a workaround, Driver is setting MRRS
16254 * then on 5700_BX chips we have to enable a workaround.
16255 * The workaround is to set the TG3PCI_DMA_RW_CTRL boundary
16257 * workaround but turns MWI off all the times so never uses
16258 * it. This seems to suggest that the workaround is insufficient.
16292 * enable this workaround if the 5703 is on the secondary
16372 * DMA workaround.
16564 /* Important! -- It is critical that the PCI-X hw workaround
16569 * mailboxes written twice to workaround a bug.
16573 /* If we are in PCI-X mode, enable register write workaround.
16575 * The workaround is to use indirect register accesses
16623 /* Various workaround register access methods */
16631 * chips, the workaround is to read back all reg writes
16847 /* Set these bits to enable statistics workaround. */
16898 * value is bad, force enable the PCIX workaround.
17012 * 8 for these chips to workaround hw errata.
17370 * do the less restrictive ONE_DMA workaround for
17416 * on those chips to enable a PCI-X workaround.