Lines Matching refs:dma_rwctrl
10066 tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl);
10072 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17346 tp->dma_rwctrl = ((0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) |
17349 tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);
17356 tp->dma_rwctrl |= 0x00180000;
17360 tp->dma_rwctrl |= 0x003f0000;
17362 tp->dma_rwctrl |= 0x003f000f;
17375 tp->dma_rwctrl |= 0x8000;
17377 tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;
17382 tp->dma_rwctrl |=
17388 tp->dma_rwctrl |= 0x00144000;
17391 tp->dma_rwctrl |= 0x00148000;
17393 tp->dma_rwctrl |= 0x001b000f;
17397 tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;
17401 tp->dma_rwctrl &= 0xfffffff0;
17406 tp->dma_rwctrl |= DMA_RWCTRL_USE_MEM_READ_MULT;
17418 tp->dma_rwctrl |= DMA_RWCTRL_ASSERT_ALL_BE;
17421 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17431 saved_dma_rwctrl = tp->dma_rwctrl;
17432 tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
17433 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17463 if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
17465 tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
17466 tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
17467 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17484 if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
17491 tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
17492 tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
17495 tp->dma_rwctrl = saved_dma_rwctrl;
17498 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
18020 netdev_info(dev, "dma_rwctrl[%08x] dma_mask[%d-bit]\n",
18021 tp->dma_rwctrl,