Lines Matching defs:pdev

494 	pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off);
495 pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val);
511 pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off);
512 pci_read_config_dword(tp->pdev, TG3PCI_REG_DATA, &val);
522 pci_write_config_dword(tp->pdev, TG3PCI_RCV_RET_RING_CON_IDX +
527 pci_write_config_dword(tp->pdev, TG3PCI_STD_RING_PROD_IDX +
533 pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off + 0x5600);
534 pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val);
542 pci_write_config_dword(tp->pdev, TG3PCI_MISC_LOCAL_CTRL,
553 pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off + 0x5600);
554 pci_read_config_dword(tp->pdev, TG3PCI_REG_DATA, &val);
634 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
635 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
638 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
661 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
662 pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
665 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
754 if (pci_channel_offline(tp->pdev))
963 if (device_may_wakeup(&tp->pdev->dev) &&
1524 addr = ssb_gige_get_phyaddr(tp->pdev);
1542 (tp->pdev->bus->number << 8) | tp->pdev->devfn);
1544 tp->mdio_bus->parent = &tp->pdev->dev;
1559 dev_warn(&tp->pdev->dev, "mdiobus_reg failed (0x%x)\n", i);
1567 dev_warn(&tp->pdev->dev, "No PHY devices\n");
1656 if (pci_channel_offline(tp->pdev))
1830 if (pci_channel_offline(tp->pdev))
1843 if (pci_channel_offline(tp->pdev)) {
2105 dev_err(&tp->pdev->dev, "Could not attach to PHY\n");
2877 } else if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 ||
2878 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S) {
2981 if (tp->pdev_peer && tp->pdev_peer != tp->pdev) {
3597 if (pci_channel_offline(tp->pdev))
4004 pci_write_config_dword(tp->pdev,
4014 err = pci_set_power_state(tp->pdev, PCI_D0);
4036 pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL,
4043 device_should_wake = device_may_wakeup(&tp->pdev->dev) &&
4276 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE));
4277 pci_set_power_state(tp->pdev, PCI_D3hot);
5080 pcie_capability_clear_word(tp->pdev, PCI_EXP_LNKCTL,
5083 pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL,
6460 if (tp->pdev->error_state != pci_channel_io_normal) {
6582 pci_unmap_single(tp->pdev,
6602 pci_unmap_page(tp->pdev,
6664 pci_unmap_single(tp->pdev, dma_unmap_addr(ri, mapping),
6729 mapping = pci_map_single(tp->pdev,
6733 if (unlikely(pci_dma_mapping_error(tp->pdev, mapping))) {
6900 pci_unmap_single(tp->pdev, dma_addr, skb_size,
6926 pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);
6930 pci_dma_sync_single_for_device(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);
7780 pci_unmap_single(tnapi->tp->pdev,
7797 pci_unmap_page(tnapi->tp->pdev,
7834 new_addr = pci_map_single(tp->pdev, new_skb->data, new_skb->len,
7837 if (pci_dma_mapping_error(tp->pdev, new_addr)) {
8063 mapping = pci_map_single(tp->pdev, skb->data, len, PCI_DMA_TODEVICE);
8064 if (pci_dma_mapping_error(tp->pdev, mapping))
8096 mapping = skb_frag_dma_map(&tp->pdev->dev, frag, 0,
8102 if (dma_mapping_error(&tp->pdev->dev, mapping))
8497 dma_free_coherent(&tp->pdev->dev, TG3_RX_STD_RING_BYTES(tp),
8502 dma_free_coherent(&tp->pdev->dev, TG3_RX_JMB_RING_BYTES(tp),
8516 tpr->rx_std = dma_alloc_coherent(&tp->pdev->dev,
8529 tpr->rx_jmb = dma_alloc_coherent(&tp->pdev->dev,
8628 dma_free_coherent(&tp->pdev->dev, TG3_TX_RING_BYTES,
8656 tnapi->tx_ring = dma_alloc_coherent(&tp->pdev->dev,
8683 dma_free_coherent(&tp->pdev->dev,
8716 tnapi->rx_rcb = dma_alloc_coherent(&tp->pdev->dev,
8743 dma_free_coherent(&tp->pdev->dev, TG3_HW_STATUS_SIZE,
8758 dma_free_coherent(&tp->pdev->dev, sizeof(struct tg3_hw_stats),
8772 tp->hw_stats = dma_alloc_coherent(&tp->pdev->dev,
8782 tnapi->hw_status = dma_alloc_coherent(&tp->pdev->dev,
8862 if (pci_channel_offline(tp->pdev)) {
8863 dev_err(&tp->pdev->dev,
8877 dev_err(&tp->pdev->dev,
8893 if (pci_channel_offline(tp->pdev)) {
8932 dev_err(&tp->pdev->dev,
8961 pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd);
8970 pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
8983 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
8985 pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd);
8988 pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
8990 pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER,
8998 pci_read_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
9001 pci_write_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
9013 pci_read_config_word(tp->pdev,
9016 pci_write_config_word(tp->pdev,
9077 if (!pci_device_is_present(tp->pdev))
9199 pci_read_config_dword(tp->pdev, PCI_COMMAND, &val);
9203 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) {
9214 pci_read_config_dword(tp->pdev, 0xc4, &cfg_val);
9215 pci_write_config_dword(tp->pdev, 0xc4,
9227 pcie_capability_clear_word(tp->pdev, PCI_EXP_DEVCTL, val16);
9230 pcie_capability_write_word(tp->pdev, PCI_EXP_DEVSTA,
10103 if (tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
10104 tp->pdev->subsystem_device == TG3PCI_SUBDEVICE_ID_DELL_5762) {
10532 pci_read_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
10541 pci_write_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
10873 struct pci_dev *pdev = tp->pdev;
10889 tp->hwmon_dev = hwmon_device_register_with_groups(&pdev->dev, "tg3",
10893 dev_err(&pdev->dev, "Cannot register hwmon device, aborting\n");
11207 tp->pdev->error_state != pci_channel_io_normal) {
11384 pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
11385 pci_write_config_word(tp->pdev, PCI_COMMAND,
11390 pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
11406 pci_disable_msi(tp->pdev);
11409 tp->napi[0].irq_vec = tp->pdev->irq;
11435 if (request_firmware(&tp->fw, tp->fw_needed, &tp->pdev->dev)) {
11504 rc = pci_enable_msix_range(tp->pdev, msix_ent, 1, tp->irq_cnt);
11520 pci_disable_msix(tp->pdev);
11551 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0)
11565 tp->napi[0].irq_vec = tp->pdev->irq;
11579 pci_disable_msix(tp->pdev);
11581 pci_disable_msi(tp->pdev);
11789 pci_set_power_state(tp->pdev, PCI_D3hot);
11807 if (pci_device_is_present(tp->pdev)) {
12362 strlcpy(info->bus_info, pci_name(tp->pdev), sizeof(info->bus_info));
12369 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev))
12374 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev))
12382 struct device *dp = &tp->pdev->dev;
12896 cnt = pci_read_vpd(tp->pdev, pos,
13556 map = pci_map_single(tp->pdev, skb->data, tx_len, PCI_DMA_TODEVICE);
13557 if (pci_dma_mapping_error(tp->pdev, map)) {
13655 pci_dma_sync_single_for_cpu(tp->pdev, map, rx_len,
15184 tp->pdev->subsystem_vendor) &&
15186 tp->pdev->subsystem_device))
15214 device_set_wakeup_enable(&tp->pdev->dev, true);
15325 tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)
15333 if ((tp->pdev->subsystem_vendor ==
15335 (tp->pdev->subsystem_device == 0x205a ||
15336 tp->pdev->subsystem_device == 0x2063))
15360 device_set_wakeup_enable(&tp->pdev->dev, true);
15403 device_set_wakeup_enable(&tp->pdev->dev,
15406 device_set_wakeup_capable(&tp->pdev->dev, false);
15747 if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
15748 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717_C)
15750 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718)
15755 if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57780)
15757 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57760)
15759 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57790)
15761 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57788)
15766 if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761)
15768 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765)
15770 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781)
15772 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785)
15774 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791)
15776 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795)
15781 if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57762)
15783 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57766)
15785 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57782)
15787 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57786)
16013 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5725)
16110 unsigned int func, devnr = tp->pdev->devfn & ~7;
16113 peer = pci_get_slot(tp->pdev->bus, devnr | func);
16114 if (peer && peer != tp->pdev)
16119 * tp->pdev in that case.
16122 peer = tp->pdev;
16146 if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
16147 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717_C ||
16148 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 ||
16149 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 ||
16150 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720 ||
16151 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57767 ||
16152 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57764 ||
16153 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5762 ||
16154 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5725 ||
16155 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5727 ||
16156 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57787)
16158 else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781 ||
16159 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785 ||
16160 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761 ||
16161 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765 ||
16162 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
16163 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795 ||
16164 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57762 ||
16165 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57766 ||
16166 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57782 ||
16167 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57786)
16172 pci_read_config_dword(tp->pdev, reg, &tp->pci_chip_rev_id);
16260 pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
16262 pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
16269 pci_read_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
16273 pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
16328 tp->pdev->bus->number)) {
16358 tp->pdev->bus->number) &&
16360 tp->pdev->bus->number)) {
16376 tp->msi_cap = tp->pdev->msi_cap;
16386 tp->pdev->bus->number) &&
16388 tp->pdev->bus->number)) {
16455 tp->pdev_peer == tp->pdev))
16502 pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
16505 if (pci_is_pcie(tp->pdev)) {
16510 pcie_capability_read_word(tp->pdev, PCI_EXP_LNKCTL, &lnkctl);
16532 tp->pcix_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_PCIX);
16534 dev_err(&tp->pdev->dev,
16553 pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
16555 pci_read_config_byte(tp->pdev, PCI_LATENCY_TIMER,
16560 pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER,
16587 pci_read_config_dword(tp->pdev,
16588 tp->pdev->pm_cap + PCI_PM_CTRL,
16592 pci_write_config_dword(tp->pdev,
16593 tp->pdev->pm_cap + PCI_PM_CTRL,
16597 pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
16599 pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
16612 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg);
16656 pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
16658 pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
16681 tp->pci_fn = PCI_FUNC(tp->pdev->devfn) & 3;
16685 pci_read_config_dword(tp->pdev,
16732 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE,
16761 if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 ||
16762 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S) {
16821 if (tp->pdev->device != PCI_DEVICE_ID_TIGON3_5756 &&
16822 tp->pdev->device != PCI_DEVICE_ID_TIGON3_5722)
16824 if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5755M)
16886 pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
16934 pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
16949 dev_err(&tp->pdev->dev, "phy probe failed, err %d\n", err);
16979 if (tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
17033 if (!eth_platform_get_mac_address(&tp->pdev->dev, dev->dev_addr))
17037 err = ssb_gige_get_macaddr(tp->pdev, &dev->dev_addr[0]);
17110 pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, &byte);
17296 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR,
17298 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
17300 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
17339 buf = dma_alloc_coherent(&tp->pdev->dev, TEST_BUFFER_SIZE,
17444 dev_err(&tp->pdev->dev,
17453 dev_err(&tp->pdev->dev, "%s: Buffer read failed. "
17470 dev_err(&tp->pdev->dev,
17502 dma_free_coherent(&tp->pdev->dev, TEST_BUFFER_SIZE, buf, buf_dma);
17662 static int tg3_init_one(struct pci_dev *pdev,
17673 err = pci_enable_device(pdev);
17675 dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n");
17679 err = pci_request_regions(pdev, DRV_MODULE_NAME);
17681 dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n");
17685 pci_set_master(pdev);
17693 SET_NETDEV_DEV(dev, &pdev->dev);
17696 tp->pdev = pdev;
17708 if (pdev_is_ssb_gige_core(pdev)) {
17710 if (ssb_gige_must_flush_posted_writes(pdev))
17712 if (ssb_gige_one_dma_at_once(pdev))
17714 if (ssb_gige_have_roboswitch(pdev)) {
17718 if (ssb_gige_is_rgmii(pdev))
17747 tp->regs = pci_ioremap_bar(pdev, BAR_0);
17749 dev_err(&pdev->dev, "Cannot map device registers, aborting\n");
17754 if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 ||
17755 tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761E ||
17756 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S ||
17757 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761SE ||
17758 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
17759 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717_C ||
17760 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 ||
17761 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 ||
17762 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720 ||
17763 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57767 ||
17764 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57764 ||
17765 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5762 ||
17766 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5725 ||
17767 tp->pdev->device == TG3PCI_DEVICE_TIGON3_5727 ||
17768 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57787) {
17770 tp->aperegs = pci_ioremap_bar(pdev, BAR_2);
17772 dev_err(&pdev->dev,
17785 dev->irq = pdev->irq;
17789 dev_err(&pdev->dev,
17812 err = pci_set_dma_mask(pdev, dma_mask);
17815 err = pci_set_consistent_dma_mask(pdev,
17818 dev_err(&pdev->dev, "Unable to obtain 64 bit "
17825 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
17827 dev_err(&pdev->dev,
17896 dev_err(&pdev->dev,
17960 dev_err(&pdev->dev, "DMA engine test failed, aborting\n");
17966 pci_set_drvdata(pdev, dev);
17979 dev_err(&pdev->dev, "Cannot register net device, aborting\n");
17986 &tp->pdev->dev);
18022 pdev->dma_mask == DMA_BIT_MASK(32) ? 32 :
18023 ((u64)pdev->dma_mask) == DMA_BIT_MASK(40) ? 40 : 64);
18025 pci_save_state(pdev);
18045 pci_release_regions(pdev);
18048 if (pci_is_enabled(pdev))
18049 pci_disable_device(pdev);
18053 static void tg3_remove_one(struct pci_dev *pdev)
18055 struct net_device *dev = pci_get_drvdata(pdev);
18081 pci_release_regions(pdev);
18082 pci_disable_device(pdev);
18184 static void tg3_shutdown(struct pci_dev *pdev)
18186 struct net_device *dev = pci_get_drvdata(pdev);
18203 pci_disable_device(pdev);
18208 * @pdev: Pointer to PCI device
18214 static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev,
18217 struct net_device *netdev = pci_get_drvdata(pdev);
18257 pci_disable_device(pdev);
18267 * @pdev: Pointer to PCI device
18274 static pci_ers_result_t tg3_io_slot_reset(struct pci_dev *pdev)
18276 struct net_device *netdev = pci_get_drvdata(pdev);
18283 if (pci_enable_device(pdev)) {
18284 dev_err(&pdev->dev,
18289 pci_set_master(pdev);
18290 pci_restore_state(pdev);
18291 pci_save_state(pdev);
18316 * @pdev: Pointer to PCI device
18321 static void tg3_io_resume(struct pci_dev *pdev)
18323 struct net_device *netdev = pci_get_drvdata(pdev);