Lines Matching defs:high
2506 u32 low, high;
2509 tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high) ||
2515 high &= 0x000f;
2517 high != test_pat[chan][i+1]) {
2753 /* Set phy register 0x10 bit 0 to high fifo elasticity to support
10187 * TG3_BDINFO_HOST_ADDR: high/low parts of DMA address of ring
10478 /* GPIO1 must be driven high for eeprom write protect */
10906 (PSTAT)->high += 1; \
10968 sp->rx_discards.high += 1;
11817 return ((u64)val->high << 32) | ((u64)val->low);
16741 * tg3_pwrsrc_switch_to_vmain(). GPIO1 driven high