Lines Matching defs:bits
76 static inline int _tg3_flag(enum TG3_FLAGS flag, unsigned long *bits)
78 return test_bit(flag, bits);
81 static inline void _tg3_flag_set(enum TG3_FLAGS flag, unsigned long *bits)
83 set_bit(flag, bits);
86 static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits)
88 clear_bit(flag, bits);
2745 /* Set bit 14 with read-modify-write to preserve other bits */
5523 /* preserve bits 0-11,13,14 for signal pre-emphasis */
5524 /* preserve bits 20-23 for voltage regulator */
6304 "Start value (nsec) is over limit. Maximum size of start is only 63 bits\n");
8847 /* We can't enable/disable these bits of the
9219 /* Clear the "no snoop" and "relaxed ordering" bits. */
13018 /* Separate the parity bits and the data bytes. */
13312 /* Write zero to the register, then make sure the read-only bits
13313 * are not changed and the read/write bits are all zeros.
13319 /* Test the read-only and read/write bits. */
13323 /* Write ones to all the bits defined by RdMask and WrMask, then
13324 * make sure the read-only bits are not changed and the
13325 * read/write bits are all ones.
13331 /* Test the read-only bits. */
13335 /* Test the read/write bits. */
14411 * want will always reside in the lower 16-bits.
16847 /* Set these bits to enable statistics workaround. */
16938 /* Preserve the APE MAC_MODE bits */
17116 /* On 5703 and later chips, the boundary bits have no
17151 * boundary bits.