Lines Matching defs:bits
340 * Synchronize with the MII - send a pattern of bits to the MII
353 uint64_t bits;
358 bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT;
360 __raw_writeq(bits | mac_mdio_genc, sbm_mdio);
363 __raw_writeq(bits | M_MAC_MDC | mac_mdio_genc, sbm_mdio);
364 __raw_writeq(bits | mac_mdio_genc, sbm_mdio);
371 * Send some bits to the MII. The bits to be sent are right-
377 * bitcnt - number of bits to send
384 uint64_t bits;
390 bits = M_MAC_MDIO_DIR_OUTPUT;
391 __raw_writeq(bits | mac_mdio_genc, sbm_mdio);
397 bits |= M_MAC_MDIO_OUT;
398 else bits &= ~M_MAC_MDIO_OUT;
399 __raw_writeq(bits | mac_mdio_genc, sbm_mdio);
400 __raw_writeq(bits | M_MAC_MDC | mac_mdio_genc, sbm_mdio);
401 __raw_writeq(bits | mac_mdio_genc, sbm_mdio);
438 * a "start" command (2 bits)
439 * a "read" command (2 bits)
440 * the PHY addr (5 bits)
441 * the register index (5 bits)
1080 * just compare the low-order bits of the virtual address
1244 * just compare the low-order bits of the virtual address
1527 * Turn on the rest of the bits in the enable register
1815 * Now add in the new bits
1848 * Send the bits back to the hardware
1943 * Send the bits back to the hardware
1973 * Read the ISR (this clears the bits in the real
2122 * Enable the "accept multicast bits" if we programmed at least one