Lines Matching refs:val1
489 u32 val1;
493 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
494 val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
496 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
502 val1 = (bp->phy_addr << 21) | (reg << 16) |
505 BNX2_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
510 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_COMM);
511 if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
514 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_COMM);
515 val1 &= BNX2_EMAC_MDIO_COMM_DATA;
521 if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY) {
526 *val = val1;
531 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
532 val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
534 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
546 u32 val1;
550 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
551 val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
553 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
559 val1 = (bp->phy_addr << 21) | (reg << 16) | val |
562 BNX2_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
567 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_COMM);
568 if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
574 if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)
580 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
581 val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
583 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
6551 u32 val1, val2;
6553 pci_read_config_dword(bp->pdev, PCI_COMMAND, &val1);
6555 atomic_read(&bp->intr_sem), val1);
6556 pci_read_config_dword(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &val1);
6558 netdev_err(dev, "DEBUG: PCI_PM[%08x] PCI_MISC_CFG[%08x]\n", val1, val2);