Lines Matching defs:ag71xx_wr
406 static void ag71xx_wr(struct ag71xx *ag, unsigned int reg, u32 value)
572 ag71xx_wr(ag, AG71XX_REG_MII_ADDR,
575 ag71xx_wr(ag, AG71XX_REG_MII_CMD, MII_CMD_READ);
583 ag71xx_wr(ag, AG71XX_REG_MII_CMD, 0);
599 ag71xx_wr(ag, AG71XX_REG_MII_ADDR,
601 ag71xx_wr(ag, AG71XX_REG_MII_CTRL, val);
662 ag71xx_wr(ag, AG71XX_REG_MII_CFG, t | MII_CFG_RESET);
665 ag71xx_wr(ag, AG71XX_REG_MII_CFG, t);
747 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0);
748 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0);
749 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0);
825 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS);
874 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0);
875 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0);
883 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma);
884 ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma);
888 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR);
889 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS);
893 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF);
894 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR);
916 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, init);
922 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, 0);
925 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
926 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, ag->fifodata[0]);
927 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, ag->fifodata[1]);
928 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT);
929 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT);
944 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t);
947 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
975 ag71xx_wr(ag, AG71XX_REG_MAC_MFL,
978 ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds);
979 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma);
980 ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg);
988 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
991 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT);
1012 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]);
1139 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
1140 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
1141 ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
1150 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, cfg1);
1441 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma);
1442 ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma);
1479 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len);
1612 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE);
1691 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR);
1758 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF);
1762 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
1810 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE);
1814 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE);
1833 ag71xx_wr(ag, AG71XX_REG_MAC_MFL,
1978 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, 0);